152 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB,  in getRegClassForTypeOnBank()  argument
155   if (RB.getID() == AArch64::GPRRegBankID) {  in getRegClassForTypeOnBank()
165   if (RB.getID() == AArch64::FPRRegBankID) {  in getRegClassForTypeOnBank()
404     const RegisterBank *RB = nullptr;  in selectCopy()  local
406       RB = RegClassOrBank.get<const RegisterBank *>();  in selectCopy()
407       SrcRC = getRegClassForTypeOnBank(MRI.getType(SrcReg), *RB, RBI, true);  in selectCopy()
615   const RegisterBank &RB = *RBI.getRegBank(LHS, MRI, TRI);  in selectCompareBranch()  local
616   if (RB.getID() != AArch64::GPRRegBankID)  in selectCompareBranch()
746           const RegisterBank &RB = *RegClassOrBank.get<const RegisterBank *>();  in select()  local
747           DefRC = getRegClassForTypeOnBank(DefTy, RB, RBI);  in select()
840     const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);  in select()  local
851       if (RB.getID() != AArch64::FPRRegBankID) {  in select()
853                           << " constant on bank: " << RB  in select()
871       if (RB.getID() != AArch64::GPRRegBankID) {  in select()
873                           << " constant on bank: " << RB  in select()
1057     const RegisterBank &RB = *RBI.getRegBank(ValReg, MRI, TRI);  in select()  local
1060         selectLoadStoreUIOp(I.getOpcode(), RB.getID(), MemSizeInBits);  in select()
1111     const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);  in select()  local
1113     if (RB.getID() != AArch64::GPRRegBankID) {  in select()
1114       LLVM_DEBUG(dbgs() << "G_[SU]MULH on bank: " << RB << ", expected: GPR\n");  in select()
1149     const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);  in select()  local
1151     const unsigned NewOpc = selectBinaryOp(I.getOpcode(), RB.getID(), OpSize);  in select()
1288     const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI);  in select()  local
1290     if (RB.getID() != AArch64::GPRRegBankID) {  in select()
1291       LLVM_DEBUG(dbgs() << TII.getName(I.getOpcode()) << " on bank: " << RB  in select()
1608   const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI);  in selectMergeValues()  local
1609   if (RB.getID() != AArch64::GPRRegBankID)  in selectMergeValues()
1652   const RegisterBank &RB = *RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI);  in selectBuildVector()  local
1655   if (RB.getID() == AArch64::GPRRegBankID) {  in selectBuildVector()
1689     if (RB.getID() == AArch64::FPRRegBankID) {  in selectBuildVector()