| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGAddressAnalysis.cpp | 26 if (!Base.getNode() || !Other.Base.getNode()) in equalBaseIndex() 33 if (Other.Base == Base) in equalBaseIndex() 45 if (auto *A = dyn_cast<ConstantPoolSDNode>(Base)) in equalBaseIndex() 66 if (auto *A = dyn_cast<FrameIndexSDNode>(Base)) in equalBaseIndex() 104 switch (Base->getOpcode()) { in match() 110 Base = DAG.getTargetLoweringInfo().unwrapAddress(Base->getOperand(0)); in match() 117 Base = DAG.getTargetLoweringInfo().unwrapAddress(Base->getOperand(0)); in match() 143 if (Base->getOpcode() == ISD::ADD) { in match() 156 Index = Base->getOperand(1); in match() 157 SDValue PotentialBase = Base->getOperand(0); in match() [all …]
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| /freebsd-12.1/contrib/llvm/tools/lldb/include/lldb/Utility/ |
| H A D | Environment.h | 43 using Base::iterator; 46 using Base::begin; 47 using Base::clear; 48 using Base::count; 49 using Base::empty; 50 using Base::end; 51 using Base::erase; 52 using Base::find; 53 using Base::insert; 54 using Base::lookup; [all …]
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| /freebsd-12.1/contrib/llvm/tools/clang/lib/AST/ |
| H A D | VTTBuilder.cpp | 47 assert(!SecondaryVirtualPointerIndices.count(Base) && in AddVTablePointer() 61 const CXXRecordDecl *RD = Base.getBase(); in LayoutSecondaryVTTs() 72 CharUnits BaseOffset = Base.getBaseOffset() + in LayoutSecondaryVTTs() 86 const CXXRecordDecl *RD = Base.getBase(); in LayoutSecondaryVirtualPointers() 120 BaseOffset = Base.getBaseOffset() + in LayoutSecondaryVirtualPointers() 181 const CXXRecordDecl *RD = Base.getBase(); in LayoutVTT() 193 SubVTTIndicies[Base] = VTTComponents.size(); in LayoutVTT() 200 AddVTablePointer(Base, VTableIndex, RD); in LayoutVTT() 203 LayoutSecondaryVTTs(Base); in LayoutVTT() 206 LayoutSecondaryVirtualPointers(Base, VTableIndex); in LayoutVTT() [all …]
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| H A D | RecordLayoutBuilder.cpp | 282 if (Base->IsVirtual) in CanPlaceBaseSubobjectAtOffset() 332 if (Base->IsVirtual) in UpdateEmptyBaseSubobjects() 391 if (Base.isVirtual()) in CanPlaceFieldSubobjectAtOffset() 497 if (Base.isVirtual()) in UpdateEmptyFieldSubobjects() 807 PrimaryBase = Base; in SelectPrimaryVBase() 845 PrimaryBase = Base; in DeterminePrimaryBase() 1097 if (Base->IsVirtual) in AddPrimaryVirtualBaseOffsets() 1125 if (Base.isVirtual()) { in LayoutVirtualBases() 1176 if (Base->IsVirtual) in LayoutBase() 1321 if (Base.isVirtual()) in Layout() [all …]
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| H A D | VTableBuilder.cpp | 231 if (Element.Base->isVirtual()) { in ComputeBaseOffset() 246 const CXXRecordDecl *Base = Element.Base->getType()->getAsCXXRecordDecl(); in ComputeBaseOffset() local 2033 const BaseSubobject &Base = in dumpLayout() local 2676 if (Element.Base->isVirtual()) { in ComputeThisOffset() 3267 if (!Base->isDynamicClass()) in computeVTablePaths() 3271 ForVBTables ? enumerateVBTables(Base) : getVFPtrOffsets(Base); in computeVTablePaths() 3285 P->NextBaseToMangle = Base; in computeVTablePaths() 3290 if (P->ObjectWithVPtr == Base && in computeVTablePaths() 3311 VBasesSeen.insert(Base); in computeVTablePaths() 3428 if (Base == RD) { in getOffsetOfFullPath() [all …]
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | MachineDominanceFrontier.h | 43 return Base.getRoots(); in getRoots() 47 return Base.getRoot(); in getRoot() 51 return Base.isPostDominator(); in isPostDominator() 55 return Base.begin(); in begin() 59 return Base.begin(); in begin() 63 return Base.end(); in end() 67 return Base.end(); in end() 71 return Base.find(B); in find() 75 return Base.find(B); in find() 83 return Base.removeBlock(BB); in removeBlock() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/ARC/ |
| H A D | ARCISelDAGToDAG.cpp | 79 Base = Addr.getOperand(0); in SelectAddrModeImm() 86 bool ARCDAGToDAGISel::SelectAddrModeS9(SDValue Addr, SDValue &Base, in SelectAddrModeS9() argument 97 Base = CurDAG->getTargetFrameIndex( in SelectAddrModeS9() 100 Base = Addr; in SelectAddrModeS9() 114 Base = Addr.getOperand(0); in SelectAddrModeS9() 115 if (Base.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9() 116 int FI = cast<FrameIndexSDNode>(Base)->getIndex(); in SelectAddrModeS9() 117 Base = CurDAG->getTargetFrameIndex( in SelectAddrModeS9() 123 Base = Addr; in SelectAddrModeS9() 130 if (SelectAddrModeS9(Addr, Base, Offset)) in SelectAddrModeFar() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.h | 51 bool selectAddrRegImm(SDValue Addr, SDValue &Base, 54 bool selectAddrDefault(SDValue Addr, SDValue &Base, 57 bool selectIntAddr(SDValue Addr, SDValue &Base, 60 bool selectAddrRegImm9(SDValue Addr, SDValue &Base, 63 bool selectAddrRegImm11(SDValue Addr, SDValue &Base, 66 bool selectAddrRegImm12(SDValue Addr, SDValue &Base, 69 bool selectAddrRegImm16(SDValue Addr, SDValue &Base, 72 bool selectIntAddr11MM(SDValue Addr, SDValue &Base, 75 bool selectIntAddr12MM(SDValue Addr, SDValue &Base, 78 bool selectIntAddr16MM(SDValue Addr, SDValue &Base, [all …]
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| H A D | MipsISelDAGToDAG.h | 59 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base, 63 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base, 67 virtual bool selectIntAddr(SDValue Addr, SDValue &Base, 70 virtual bool selectIntAddr11MM(SDValue Addr, SDValue &Base, 73 virtual bool selectIntAddr12MM(SDValue Addr, SDValue &Base, 76 virtual bool selectIntAddr16MM(SDValue Addr, SDValue &Base, 79 virtual bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, 83 virtual bool selectIntAddrSImm10(SDValue Addr, SDValue &Base, 86 virtual bool selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base, 89 virtual bool selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base, [all …]
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| H A D | MipsSEISelDAGToDAG.cpp | 347 Base = Addr.getOperand(0); in selectAddrFrameIndexOffset() 372 Base = Addr.getOperand(0); in selectAddrRegImm() 402 Base = Addr.getOperand(0); in selectAddrRegImm() 416 Base = Addr; in selectAddrDefault() 494 if (isa<FrameIndexSDNode>(Base)) in selectIntAddrLSL2MM() 1329 SDValue Base, Offset; in SelectInlineAsmMemoryOperand() local 1341 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand() 1355 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand() 1368 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand() 1375 OutOps.push_back(Base); in SelectInlineAsmMemoryOperand() [all …]
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| H A D | MipsISelDAGToDAG.cpp | 77 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base, in selectAddrRegImm() argument 83 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base, in selectAddrDefault() argument 89 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base, in selectIntAddr() argument 95 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Addr, SDValue &Base, in selectIntAddr11MM() argument 101 bool MipsDAGToDAGISel::selectIntAddr12MM(SDValue Addr, SDValue &Base, in selectIntAddr12MM() argument 107 bool MipsDAGToDAGISel::selectIntAddr16MM(SDValue Addr, SDValue &Base, in selectIntAddr16MM() argument 113 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, in selectIntAddrLSL2MM() argument 119 bool MipsDAGToDAGISel::selectIntAddrSImm10(SDValue Addr, SDValue &Base, in selectIntAddrSImm10() argument 125 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base, in selectIntAddrSImm10Lsl1() argument 143 bool MipsDAGToDAGISel::selectAddr16(SDValue Addr, SDValue &Base, in selectAddr16() argument [all …]
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| /freebsd-12.1/contrib/llvm/include/llvm/Support/ |
| H A D | Options.h | 49 template <typename ValT, typename Base, ValT(Base::*Mem)> class OptionKey { 54 template <typename ValT, typename Base, ValT(Base::*Mem)> 55 char OptionKey<ValT, Base, Mem>::ID = 0; 95 template <typename ValT, typename Base, ValT(Base::*Mem)> 100 instance().addOption(&detail::OptionKey<ValT, Base, Mem>::ID, Option); in registerOption() 111 template <typename ValT, typename Base, ValT(Base::*Mem)> ValT get() const { in get() 112 auto It = Options.find(&detail::OptionKey<ValT, Base, Mem>::ID); in get()
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| H A D | YAMLParser.h | 331 assert(Base && Base->CurrentEntry && "Attempted to access end iterator!"); 336 assert(Base && Base->CurrentEntry && 342 assert(Base && Base->CurrentEntry && "Attempted to access end iterator!"); 354 if (Base && (Base == Other.Base)) { 355 assert((Base->CurrentEntry == Other.Base->CurrentEntry) 359 return Base == Other.Base; 363 return !(Base == Other.Base); 368 Base->increment(); 370 if (!Base->CurrentEntry) 371 Base = nullptr; [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 59 SDValue Base; member 78 if (Base.getNode()) in dump() 396 AM.Base = Value; in changeComponent() 419 AM.Base = Base; in expandIndex() 508 if (!Base) in shouldUseLA() 562 AM.Base = Addr; in selectAddress() 618 Base = AM.Base; in getAddressOperands() 630 SDLoc DL(Base); in getAddressOperands() 633 Base = Trunc; in getAddressOperands() 1591 SDLoc DL(Base); in SelectInlineAsmMemoryOperand() [all …]
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| /freebsd-12.1/contrib/llvm/tools/clang/include/clang/AST/ |
| H A D | BaseSubobject.h | 33 const CXXRecordDecl *Base; variable 40 BaseSubobject(const CXXRecordDecl *Base, CharUnits BaseOffset) in BaseSubobject() argument 41 : Base(Base), BaseOffset(BaseOffset) {} in BaseSubobject() 44 const CXXRecordDecl *getBase() const { return Base; } in getBase() 50 return LHS.Base == RHS.Base && LHS.BaseOffset == RHS.BaseOffset; 71 static unsigned getHashValue(const clang::BaseSubobject &Base) { 74 return DenseMapInfo<PairTy>::getHashValue(PairTy(Base.getBase(), 75 Base.getBaseOffset()));
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| H A D | TypeLocNodes.def | 15 // TYPELOC(Class, Base) - A TypeLoc subclass. If UNQUAL_TYPELOC is 18 // UNQUAL_TYPELOC(Class, Base, Type) - An UnqualTypeLoc subclass. 25 # define UNQUAL_TYPELOC(Class, Base) TYPELOC(Class, Base) 29 # define ABSTRACT_TYPELOC(Class, Base) UNQUAL_TYPELOC(Class, Base) 33 #define TYPE(Class, Base) UNQUAL_TYPELOC(Class, Base##Loc) 34 #define ABSTRACT_TYPE(Class, Base) ABSTRACT_TYPELOC(Class, Base##Loc)
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| H A D | VTTBuilder.h | 39 VTTVTable(const CXXRecordDecl *Base, CharUnits BaseOffset, bool BaseIsVirtual) in VTTVTable() argument 40 : BaseAndIsVirtual(Base, BaseIsVirtual), BaseOffset(BaseOffset) {} in VTTVTable() 41 VTTVTable(BaseSubobject Base, bool BaseIsVirtual) in VTTVTable() argument 42 : BaseAndIsVirtual(Base.getBase(), BaseIsVirtual), in VTTVTable() 43 BaseOffset(Base.getBaseOffset()) {} in VTTVTable() 106 void AddVTablePointer(BaseSubobject Base, uint64_t VTableIndex, 110 void LayoutSecondaryVTTs(BaseSubobject Base); 117 void LayoutSecondaryVirtualPointers(BaseSubobject Base, 125 void LayoutSecondaryVirtualPointers(BaseSubobject Base, 135 void LayoutVTT(BaseSubobject Base, bool BaseIsVirtual);
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCCodeEmitter.cpp | 188 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding() 189 return (Base << 12) | Disp; in getBDAddr12Encoding() 198 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding() 210 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding() 221 return (Index << 24) | (Base << 20) | ((Disp & 0xfff) << 8) in getBDXAddr20Encoding() 232 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Len)); in getBDLAddr12Len4Encoding() 233 return (Len << 16) | (Base << 12) | Disp; in getBDLAddr12Len4Encoding() 243 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<8>(Len)); in getBDLAddr12Len8Encoding() 244 return (Len << 16) | (Base << 12) | Disp; in getBDLAddr12Len8Encoding() 255 return (Len << 16) | (Base << 12) | Disp; in getBDRAddr12Encoding() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 212 uint64_t Base = Imm >> 16; in decodeMemRIOperands() local 215 assert(Base < 32 && "Invalid base register"); in decodeMemRIOperands() 247 uint64_t Base = Imm >> 14; in decodeMemRIXOperands() local 250 assert(Base < 32 && "Invalid base register"); in decodeMemRIXOperands() 268 uint64_t Base = Imm >> 12; in decodeMemRIX16Operands() local 271 assert(Base < 32 && "Invalid base register"); in decodeMemRIX16Operands() 283 uint64_t Base = Imm >> 5; in decodeSPE8Operands() local 286 assert(Base < 32 && "Invalid base register"); in decodeSPE8Operands() 298 uint64_t Base = Imm >> 5; in decodeSPE4Operands() local 301 assert(Base < 32 && "Invalid base register"); in decodeSPE4Operands() [all …]
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| /freebsd-12.1/contrib/llvm/tools/clang/include/clang/Tooling/Refactoring/ |
| H A D | RefactoringActionRulesInternal.h | 97 template <typename Base, typename First, typename... Rest> 98 struct HasBaseOf : std::conditional<HasBaseOf<Base, First>::value || 99 HasBaseOf<Base, Rest...>::value, 102 template <typename Base, typename T> 103 struct HasBaseOf<Base, T> : std::is_base_of<Base, T> {}; 107 template <typename Base, typename First, typename... Rest> 108 struct AreBaseOf : std::conditional<AreBaseOf<Base, First>::value && 109 AreBaseOf<Base, Rest...>::value, 112 template <typename Base, typename T> 113 struct AreBaseOf<Base, T> : std::is_base_of<Base, T> {};
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 294 uint64_t Base = Field >> 12; in decodeBDAddr12Operand() local 297 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr12Operand() 304 uint64_t Base = Field >> 20; in decodeBDAddr20Operand() local 307 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr20Operand() 315 uint64_t Base = (Field >> 12) & 0xf; in decodeBDXAddr12Operand() local 318 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr12Operand() 330 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr20Operand() 342 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDLAddr12Len4Operand() 354 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDLAddr12Len8Operand() 366 Inst.addOperand(MCOperand::createReg(Base == 0 ? 0 : Regs[Base])); in decodeBDRAddr12Operand() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Analysis/ |
| H A D | LoopUnrollAnalyzer.cpp | 50 auto *Base = dyn_cast<SCEVUnknown>(SE.getPointerBase(S)); in simplifyInstWithSCEV() local 51 if (!Base) in simplifyInstWithSCEV() 54 dyn_cast<SCEVConstant>(SE.getMinusSCEV(ValueAtIteration, Base)); in simplifyInstWithSCEV() 58 Address.Base = Base->getValue(); in simplifyInstWithSCEV() 91 return Base::visitBinaryOperator(I); in visitBinaryOperator() 103 auto *GV = dyn_cast<GlobalVariable>(AddressIt->second.Base); in visitLoad() 163 return Base::visitCastInst(I); in visitCastInst() 185 if (LHSAddr.Base == RHSAddr.Base) { in visitCmpInst() 204 return Base::visitCmpInst(I); in visitCmpInst() 210 if (Base::visitPHINode(PN)) in visitPHINode()
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| /freebsd-12.1/contrib/llvm/lib/Target/MSP430/InstPrinter/ |
| H A D | MSP430InstPrinter.cpp | 70 const MCOperand &Base = MI->getOperand(OpNo); in printSrcMemOperand() local 81 if (Base.getReg() == MSP430::SR) in printSrcMemOperand() 92 if ((Base.getReg() != MSP430::SR) && in printSrcMemOperand() 93 (Base.getReg() != MSP430::PC)) in printSrcMemOperand() 94 O << '(' << getRegisterName(Base.getReg()) << ')'; in printSrcMemOperand() 99 const MCOperand &Base = MI->getOperand(OpNo); in printIndRegOperand() local 100 O << "@" << getRegisterName(Base.getReg()); in printIndRegOperand() 105 const MCOperand &Base = MI->getOperand(OpNo); in printPostIndRegOperand() local 106 O << "@" << getRegisterName(Base.getReg()) << "+"; in printPostIndRegOperand()
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| /freebsd-12.1/sys/contrib/dev/acpica/components/utilities/ |
| H A D | utstrtoul64.c | 235 UINT32 Base = 10; /* Default is decimal */ in AcpiUtStrtoul64() local 260 Base = 16; in AcpiUtStrtoul64() 269 Base = 8; in AcpiUtStrtoul64() 289 switch (Base) in AcpiUtStrtoul64() 459 UINT32 Base = 10; /* Default is decimal */ in AcpiUtExplicitStrtoul64() local 476 Base = 16; in AcpiUtExplicitStrtoul64() 489 switch (Base) in AcpiUtExplicitStrtoul64()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 551 .addReg(Base) in UpdateBaseRegUses() 558 if (MBBI->killsRegister(Base) || MBBI->definesRegister(Base)) in UpdateBaseRegUses() 572 .addReg(Base) in UpdateBaseRegUses() 742 Base = NewBase; in CreateLoadStoreMulti() 764 Base = NewBase; in CreateLoadStoreMulti() 1451 .addReg(Base) in MergeBaseUpdateLoadStore() 1460 .addReg(Base) in MergeBaseUpdateLoadStore() 1474 .addReg(Base) in MergeBaseUpdateLoadStore() 1482 .addReg(Base) in MergeBaseUpdateLoadStore() 1505 if (Reg0Op.getReg() == Base || Reg1Op.getReg() == Base) in MergeBaseUpdateLSDouble() [all …]
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