Lines Matching refs:Base

212   uint64_t Base = Imm >> 16;  in decodeMemRIOperands()  local
215 assert(Base < 32 && "Invalid base register"); in decodeMemRIOperands()
226 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
233 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
238 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
247 uint64_t Base = Imm >> 14; in decodeMemRIXOperands() local
250 assert(Base < 32 && "Invalid base register"); in decodeMemRIXOperands()
254 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
256 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
259 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
268 uint64_t Base = Imm >> 12; in decodeMemRIX16Operands() local
271 assert(Base < 32 && "Invalid base register"); in decodeMemRIX16Operands()
274 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIX16Operands()
283 uint64_t Base = Imm >> 5; in decodeSPE8Operands() local
286 assert(Base < 32 && "Invalid base register"); in decodeSPE8Operands()
289 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE8Operands()
298 uint64_t Base = Imm >> 5; in decodeSPE4Operands() local
301 assert(Base < 32 && "Invalid base register"); in decodeSPE4Operands()
304 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE4Operands()
313 uint64_t Base = Imm >> 5; in decodeSPE2Operands() local
316 assert(Base < 32 && "Invalid base register"); in decodeSPE2Operands()
319 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE2Operands()