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Searched defs:ResVT (Results 1 – 21 of 21) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVVPISelLowering.cpp345 MVT ResVT = splitVectorType(Op.getValue(0).getSimpleValueType()); in splitVectorOp() local
H A DVECustomDAG.cpp562 SDValue VECustomDAG::getLegalReductionOpVVP(unsigned VVPOpcode, EVT ResVT, in getLegalReductionOpVVP()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp263 EVT ResVT = N->getValueType(0); in ScalarizeVecRes_OverflowOp() local
1640 EVT ResVT = N->getValueType(0); in SplitVecRes_OverflowOp() local
2849 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE() local
2868 EVT ResVT = N->getValueType(0); in SplitVecOp_VECREDUCE_SEQ() local
2894 EVT ResVT = N->getValueType(0); in SplitVecOp_VP_REDUCE() local
2918 EVT ResVT = N->getValueType(0); in SplitVecOp_UnaryOp() local
2977 EVT ResVT = N->getValueType(0); in SplitVecOp_INSERT_SUBVECTOR() local
3559 EVT ResVT = N->getValueType(0); in SplitVecOp_FP_ROUND() local
3600 EVT ResVT = N->getValueType(0); in SplitVecOp_FP_TO_XINT_SAT() local
4211 EVT ResVT = N->getValueType(0); in WidenVecRes_OverflowOp() local
[all …]
H A DLegalizeIntegerTypes.cpp303 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_Atomic0() local
2272 EVT ResVT = N->getValueType(0); in PromoteIntOp_VECREDUCE() local
5544 EVT ResVT = N->getValueType(0); in PromoteIntOp_CONCAT_VECTORS() local
H A DSelectionDAG.cpp1852 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT) { in getStepVector()
1857 SDValue SelectionDAG::getStepVector(const SDLoc &DL, EVT ResVT, APInt StepVal) { in getStepVector()
11169 EVT ResVT = N->getValueType(0); in UnrollVectorOverflowOp() local
H A DDAGCombiner.cpp7263 EVT ResVT = ExtractFrom.getValueType(); in extractShiftForRotate() local
17170 EVT ResVT = Use->getValueType(0); in canMergeExpensiveCrossRegisterBankCopy() local
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2478 EVT ResVT = N->getValueType(0); in performVectorExtendCombine() local
2545 EVT ResVT; in performVectorTruncZeroCombine() local
2592 EVT ResVT; in performVectorTruncZeroCombine() local
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp4924 EVT ResVT = N->getValueType(0); in ReplaceLoadVector() local
5068 EVT ResVT = N->getValueType(0); in ReplaceINTRINSIC_W_CHAIN() local
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp1685 EVT ResVT = TLI->getValueType(DL, ResTy); in getExtendedAddReductionCost() local
H A DARMISelLowering.cpp16846 EVT ResVT = N->getValueType(0); in PerformVECREDUCE_ADDCombine() local
20931 bool ARMTargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1570 EVT ResVT = getTLI()->getValueType(DL, RetTy, true); in getIntrinsicInstrCost() local
H A DTargetLowering.h3002 virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1562 bool AArch64TargetLowering::shouldExpandGetActiveLaneMask(EVT ResVT, in shouldExpandGetActiveLaneMask()
13742 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
17276 EVT ResVT = N->getValueType(0); in performUzpCombine() local
17349 EVT ResVT = N->getValueType(0); in performGLD1Combine() local
18719 EVT ResVT = N->getValueType(0); in performVSelectCombine() local
18743 EVT ResVT = N->getValueType(0); in performSelectCombine() local
19776 EVT ResVT = N->getValueType(0); in PerformDAGCombine() local
21396 EVT ResVT = SrcVT.getVectorElementType(); in LowerVECREDUCE_SEQ_FADD() local
21476 EVT ResVT = (Opcode == AArch64ISD::UADDV_PRED) ? MVT::i64 : in LowerReductionToSVE() local
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FastISel.cpp3561 EVT ResVT = VA.getValVT(); in fastLowerCall() local
H A DX86ISelLowering.cpp11440 MVT ResVT = Op.getSimpleValueType(); in LowerAVXCONCAT_VECTORS() local
11499 MVT ResVT = Op.getSimpleValueType(); in LowerCONCAT_VECTORSvXi1() local
21719 EVT ResVT = getSetCCResultType(DAG.getDataLayout(), in FP_TO_INTHelper() local
22342 MVT ResVT = MVT::v4i32; in LowerFP_TO_INT() local
22383 MVT ResVT = VT; in LowerFP_TO_INT() local
32734 EVT ResVT = EleVT == MVT::i32 ? MVT::v4i32 : MVT::v8i16; in ReplaceNodeResults() local
43311 EVT ResVT = in combineVPDPBUSDPattern() local
43386 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), ExtractVT, in combineBasicSADPattern() local
50528 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i16, in detectPMADDUBSW() local
53378 EVT ResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, in matchPMADDWD() local
[all …]
H A DX86ISelDAGToDAG.cpp4623 MVT ResVT = Setcc.getSimpleValueType(); in tryVPTESTM() local
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp3511 EVT ResVT = Op.getValueType(); in lowerBITCAST() local
6050 SDValue SystemZTargetLowering::combineExtract(const SDLoc &DL, EVT ResVT, in combineExtract()
6182 EVT ResVT = (TruncBytes < 4 ? MVT::i32 : TruncVT); in combineTruncateExtract() local
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4410 EVT ResVT = VecVT.changeVectorElementTypeToInteger(); in trySETCC() local
H A DPPCISelLowering.cpp7893 EVT ResVT = Op.getValueType(); in LowerSELECT_CC() local
14698 EVT ResVT = Val.getValueType(); in combineStoreFPToInt() local
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp1599 bool SITargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT, in isExtractSubvectorCheap()
4634 auto ResVT = DAG.GetSplitDestVTs(VT); in splitTernaryVectorOp() local
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp5390 MVT ResVT = !VecVT.isInteger() || VecEltVT.bitsGE(XLenVT) ? VecEltVT : XLenVT; in lowerVPREDUCE() local