| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXLowerAggrCopies.cpp | 108 unsigned NumLoads = DL.getTypeStoreSize(LI->getType()); in runOnFunction() local
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.cpp | 191 unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth; in getMemoryOpCost() local
203 unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth; in getMemoryOpCost() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 242 unsigned NumLoads = getMaxVLFor(&VTy); in getGatherScatterOpCost() local
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| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | LoopAccessAnalysis.h | 680 unsigned NumLoads = 0; variable
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | ExpandMemCmp.cpp | 377 const unsigned NumLoads = in getCompareLoadPairs() local
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InterleavedAccess.cpp | 198 unsigned int NumLoads = NumSubVectors; in decompose() local
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1329 unsigned NumLoads) const { in shouldScheduleLoadsNear()
1404 unsigned NumLoads, unsigned NumBytes) const { in shouldClusterMemOps()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 269 unsigned NumLoads = 0; in ClusterNeighboringLoads() local
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | LowerMatrixIntrinsics.cpp | 196 unsigned NumLoads = 0; member
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | CodeGenDAGPatterns.cpp | 4161 unsigned NumLoads = 0; in VerifyInstructionFlags() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1353 int NumLoads = 1; in applyMappingSBufferLoad() local
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| H A D | SIInstrInfo.cpp | 486 unsigned NumLoads, in shouldClusterMemOps()
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| H A D | SIISelLowering.cpp | 6710 unsigned NumLoads = 1; in lowerSBuffer() local
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 2817 ArrayRef<const MachineOperand *> BaseOps2, unsigned NumLoads, in shouldClusterMemOps()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 3300 ArrayRef<const MachineOperand *> BaseOps2, unsigned NumLoads, in shouldClusterMemOps()
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| H A D | AArch64ISelLowering.cpp | 13051 unsigned NumLoads = getNumInterleavedAccesses(VTy, DL, UseScalable); in lowerInterleavedLoad() local
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 5781 unsigned NumLoads = Legal->getNumLoads(); in selectInterleaveCount() local
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 21352 unsigned NumLoads = getNumInterleavedAccesses(VecTy, DL); in lowerInterleavedLoad() local
|