[WebAssembly] Convert stackified IMPLICIT_DEF into constant 0.

Since IMPLIFIT_DEF instructions are omitted in the output, when the output
of an IMPLICIT_DEF instruction is stackified, the resulting

[WebAssembly] Convert stackified IMPLICIT_DEF into constant 0.

Since IMPLIFIT_DEF instructions are omitted in the output, when the output
of an IMPLICIT_DEF instruction is stackified, the resulting register lacks
an explicit push, leading to a push/pop mismatch. Fix this by converting
such IMPLICIT_DEFs into CONST_I32 0 instructions so that they have explicit
pushes.

llvm-svn: 286274

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[WebAssembly] Add an option to make get_local/set_local explicit.

This patch adds a pass, controlled by an option and off by default for
now, for making implicit get_local/set_local explicit. This s

[WebAssembly] Add an option to make get_local/set_local explicit.

This patch adds a pass, controlled by an option and off by default for
now, for making implicit get_local/set_local explicit. This simplifies
emitting wasm with MC.

Differential Revision: https://reviews.llvm.org/D25836

llvm-svn: 285009

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[WebAssembly] Update to more stack-machine-oriented terminology.

WebAssembly has officially switched from being an AST to being a stack
machine. Update various bits of terminology and README.md entr

[WebAssembly] Update to more stack-machine-oriented terminology.

WebAssembly has officially switched from being an AST to being a stack
machine. Update various bits of terminology and README.md entries
accordingly.

llvm-svn: 283154

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[WebAssemby] Clean up an obsolete comment.

The comment is present inside the body of GetVRegDef.

llvm-svn: 283153

Use StringRef in Pass/PassManager APIs (NFC)

llvm-svn: 283004

[WebAssembly] Make register stackification more conservative

Register stackification currently checks VNInfo for changes. Make that
more accurate by testing each intervening instruction for any othe

[WebAssembly] Make register stackification more conservative

Register stackification currently checks VNInfo for changes. Make that
more accurate by testing each intervening instruction for any other defs
to the same virtual register.

Patch by Jacob Gravelle

Differential Revision: https://reviews.llvm.org/D24942

llvm-svn: 282886

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Fix WebAssembly broken build related to interface change in r281172.

Reviewers: bkramer

Subscribers: jfb, llvm-commits, dschuff

Differential Revision: https://reviews.llvm.org/D24449

llvm-svn: 28

Fix WebAssembly broken build related to interface change in r281172.

Reviewers: bkramer

Subscribers: jfb, llvm-commits, dschuff

Differential Revision: https://reviews.llvm.org/D24449

llvm-svn: 281201

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[CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantLoad. NFC

Summary:
I want to separate out the notions of invariance and dereferenceability
at the MI level, so that they

[CodeGen] Rename MachineInstr::isInvariantLoad to isDereferenceableInvariantLoad. NFC

Summary:
I want to separate out the notions of invariance and dereferenceability
at the MI level, so that they correspond to the equivalent concepts at
the IR level. (Currently an MI load is MI-invariant iff it's
IR-invariant and IR-dereferenceable.)

First step is renaming this function.

Reviewers: chandlerc

Subscribers: MatzeB, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D23370

llvm-svn: 281125

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[WebAssembly] Handle debug information and virtual registers without crashing (reland r278967)

Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This

[WebAssembly] Handle debug information and virtual registers without crashing (reland r278967)

Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes these by skipping debug values in backend passes.

Reviewers: jfb, aprantl, dschuff, echristo

Subscribers: llvm-commits, dschuff, jfb, MatzeB, dexonsmith, yurydelendik, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23635

llvm-svn: 279011

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Revert "[WebAssembly] Handle debug information and virtual registers without crashing"

This reverts commit r278967, since the new test is failing when you
don't build the WebAssembly target (most pe

Revert "[WebAssembly] Handle debug information and virtual registers without crashing"

This reverts commit r278967, since the new test is failing when you
don't build the WebAssembly target (most people, since it's
off-by-default).

llvm-svn: 278973

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[WebAssembly] Handle debug information and virtual registers without crashing

Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes the

[WebAssembly] Handle debug information and virtual registers without crashing

Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes these by skipping debug values in backend passes.

Reviewers: jfb, aprantl, dschuff, echristo

Subscribers: mehdi_amini, yurydelendik, dexonsmith, MatzeB, jfb, dschuff, llvm-commits

Differential Revision: https://reviews.llvm.org/D21808

llvm-svn: 278967

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[WebAssembly] Cleanup trailing whitespace

Summary: Test for commit access.

Subscribers: jfb, dschuff

Differential Revision: https://reviews.llvm.org/D23392

llvm-svn: 278313

[WebAssembly] Initial SIMD128 support.

Kicks off the implementation of wasm SIMD128 support (spec:
https://github.com/stoklund/portable-simd/blob/master/portable-simd.md),
adding support for add, su

[WebAssembly] Initial SIMD128 support.

Kicks off the implementation of wasm SIMD128 support (spec:
https://github.com/stoklund/portable-simd/blob/master/portable-simd.md),
adding support for add, sub, mul for i8x16, i16x8, i32x4, and f32x4.

The spec is WIP, and might change in the near future.

Patch by João Porto

Differential Revision: https://reviews.llvm.org/D22686

llvm-svn: 277543

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WebAssembly: Avoid implicit iterator conversions, NFC

Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr* in the WebAssembly backend by preferring MachineInstr&
over MachineI

WebAssembly: Avoid implicit iterator conversions, NFC

Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr* in the WebAssembly backend by preferring MachineInstr&
over MachineInstr*.

llvm-svn: 274912

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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when th

CodeGen: Use MachineInstr& in TargetInstrInfo, NFC

This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr. This is a
general API improvement.

Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other. Instead I've done everything as a block and just
updated what was necessary.

This is mostly mechanical fixes: adding and removing `*` and `&`
operators. The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy. I couldn't run tests
for AVR since llc doesn't link with it turned on.

llvm-svn: 274189

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[WebAssembly] Speed up LiveIntervals updating.

Use the more specific LiveInterval::removeSegment instead of
LiveInterval::shrinkToUses when we know the specific range that's
being removed.

llvm-svn

[WebAssembly] Speed up LiveIntervals updating.

Use the more specific LiveInterval::removeSegment instead of
LiveInterval::shrinkToUses when we know the specific range that's
being removed.

llvm-svn: 270463

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[WebAssembly] Model the stack evaluation order more precisely.

We currently don't represent get_local and set_local explicitly; they
are just implied by virtual register use and def. This avoids a l

[WebAssembly] Model the stack evaluation order more precisely.

We currently don't represent get_local and set_local explicitly; they
are just implied by virtual register use and def. This avoids a lot of
clutter, but it does complicate stackifying: get_locals read their
operands at their position in the stack evaluation order, rather than
at their parent instruction. This patch adds code to walk the stack to
determine the precise ordering, when needed.

llvm-svn: 269854

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[WebAssembly] Don't stackify calls past stack pointer modifications.

llvm-svn: 269843

[WebAssembly] Stackify induction variable increment instructions.

This handles instructions where the defined register is also used, as in
"x = x + 1".

llvm-svn: 269830

[WebAssembly] Improve the precision of memory and side effect dependence tracking.

MachineInstr::isSafeToMove is more conservative than is needed here;
use a more explicit check, and incorporate kno

[WebAssembly] Improve the precision of memory and side effect dependence tracking.

MachineInstr::isSafeToMove is more conservative than is needed here;
use a more explicit check, and incorporate knowledge of some
WebAssembly-specific opcodes.

llvm-svn: 269736

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[WebAssembly] Fast-isel support for calls, arguments, and selects.

llvm-svn: 269273

[WebAssembly] Move register stackification and coloring to a late phase.

Move the register stackification and coloring passes to run very late, after
PEI, tail duplication, and most other passes. Th

[WebAssembly] Move register stackification and coloring to a late phase.

Move the register stackification and coloring passes to run very late, after
PEI, tail duplication, and most other passes. This means that all code emitted
and expanded by those passes is now exposed to these passes. This also
eliminates the need for prologue/epilogue code to be manually stackified,
which significantly simplifies the code.

This does require running LiveIntervals a second time. It's useful to think
of these late passes not as late optimization passes, but as a domain-specific
compression algorithm based on knowledge of liveness information. It's used to
compress the code after all conventional optimizations are complete, which is
why it uses LiveIntervals at a phase when actual optimization passes don't
typically need it.

Differential Revision: http://reviews.llvm.org/D20075

llvm-svn: 269012

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Try to fix build of WebAssemblyRegStackify.cpp on Windows

It's failing to build on VS2015 with:

C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\lib\Target\WebAssembly\WebAssemblyRegStackify

Try to fix build of WebAssemblyRegStackify.cpp on Windows

It's failing to build on VS2015 with:

C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\lib\Target\WebAssembly\WebAssemblyRegStackify.cpp(520):
error C2668: 'llvm::make_reverse_iterator': ambiguous call to overloaded function
C:\b\build\slave\ClangToTWin\build\src\third_party\llvm\include\llvm/ADT/STLExtras.h(217):
note: could be 'std::reverse_iterator<llvm::MachineBasicBlock::iterator>
llvm::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(IteratorTy)'
with
[
IteratorTy=llvm::MachineInstrBundleIterator<llvm::MachineInstr>
]
C:\b\depot_tools\win_toolchain\vs_files\391bbf1220d3edcd3cc3fccdb56224181e3b13a7\win_sdk\bin\..\..\VC\include\xutility(1217):
note: or 'std::reverse_iterator<llvm::MachineBasicBlock::iterator>
std::make_reverse_iterator<llvm::MachineInstrBundleIterator<llvm::MachineInstr>>(_RanIt)' [found using argument-dependent lookup]
with
[
_RanIt=llvm::MachineInstrBundleIterator<llvm::MachineInstr>
]

I don't have VS2015 locally at the moment, but hopefully this will help.

llvm-svn: 263418

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WebAssembly: fix build

More API churn, experimental target got sad.

llvm-svn: 262179

WebAssembly: fix build

It was broken by the work for PR26753.

llvm-svn: 262140