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Revision tags: v6.15, v6.15-rc7, v6.15-rc6, v6.15-rc5, v6.15-rc4, v6.15-rc3, v6.15-rc2, v6.15-rc1, v6.14, v6.14-rc7, v6.14-rc6, v6.14-rc5, v6.14-rc4, v6.14-rc3, v6.14-rc2, v6.14-rc1, v6.13, v6.13-rc7, v6.13-rc6, v6.13-rc5, v6.13-rc4, v6.13-rc3, v6.13-rc2, v6.13-rc1, v6.12, v6.12-rc7, v6.12-rc6, v6.12-rc5, v6.12-rc4, v6.12-rc3, v6.12-rc2, v6.12-rc1, v6.11, v6.11-rc7, v6.11-rc6, v6.11-rc5, v6.11-rc4, v6.11-rc3, v6.11-rc2, v6.11-rc1, v6.10, v6.10-rc7, v6.10-rc6, v6.10-rc5, v6.10-rc4, v6.10-rc3, v6.10-rc2, v6.10-rc1, v6.9, v6.9-rc7, v6.9-rc6, v6.9-rc5, v6.9-rc4 |
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| #
4bcc2e91 |
| 11-Apr-2024 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Drop legacy idle quirk handling
There are no more users that need the legacy idle quirk so let's drop the legacy idle quirk handling. This simplifies the PM code to just sysc_pm_ops wi
bus: ti-sysc: Drop legacy idle quirk handling
There are no more users that need the legacy idle quirk so let's drop the legacy idle quirk handling. This simplifies the PM code to just sysc_pm_ops with unified handling for all the interconnect targets.
Reviewed-by: Dhruva Gole <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v6.9-rc3, v6.9-rc2, v6.9-rc1, v6.8, v6.8-rc7, v6.8-rc6, v6.8-rc5, v6.8-rc4, v6.8-rc3, v6.8-rc2, v6.8-rc1, v6.7, v6.7-rc8, v6.7-rc7, v6.7-rc6, v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1, v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3 |
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5c99fa73 |
| 21-Sep-2021 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Handle otg force idle quirk
Let's add handling the otg force idle quirk for the old omap2430 glue layer used up to omap4 as the musb driver quirk only works if the driver is loaded. Un
bus: ti-sysc: Handle otg force idle quirk
Let's add handling the otg force idle quirk for the old omap2430 glue layer used up to omap4 as the musb driver quirk only works if the driver is loaded. Unlike with the am335x glue layer, looks like we don't need the quirk handling for SYSC_QUIRK_REINIT_ON_CTX_LOST.
Eventually when all the musb using SoCs are booting with device tree based configuration, we can just remove the related quirk handling from the musb driver.
Signed-off-by: Tony Lindgren <[email protected]>
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6a52bc2b |
| 21-Sep-2021 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Add quirk handling for reset on re-init
At least am335x gpmc module needs a reset in addition to re-init on resume. Let's add a quirk handling for reset on re-init.
Signed-off-by: Ton
bus: ti-sysc: Add quirk handling for reset on re-init
At least am335x gpmc module needs a reset in addition to re-init on resume. Let's add a quirk handling for reset on re-init.
Signed-off-by: Tony Lindgren <[email protected]>
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9d881361 |
| 21-Sep-2021 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Add quirk handling for reinit on context lost
Some interconnect target modules such as otg and gpmc on am335x need a re-init after resume. As we also have PM runtime cases where the co
bus: ti-sysc: Add quirk handling for reinit on context lost
Some interconnect target modules such as otg and gpmc on am335x need a re-init after resume. As we also have PM runtime cases where the context may be lost, let's handle these all with cpu_pm.
For the am335x resume path, we already have cpu_pm_resume() call cpu_pm_cluster_exit().
Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3 |
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4d7b324e |
| 18-May-2021 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Fix am335x resume hang for usb otg module
On am335x, suspend and resume only works once, and the system hangs if suspend is attempted again. However, turns out suspend and resume works
bus: ti-sysc: Fix am335x resume hang for usb otg module
On am335x, suspend and resume only works once, and the system hangs if suspend is attempted again. However, turns out suspend and resume works fine multiple times if the USB OTG driver for musb controller is loaded.
The issue is caused my the interconnect target module losing context during suspend, and it needs a restore on resume to be reconfigure again as debugged earlier by Dave Gerlach <[email protected]>.
There are also other modules that need a restore on resume, like gpmc as noted by Dave. So let's add a common way to restore an interconnect target module based on a quirk flag. For now, let's enable the quirk for am335x otg only to fix the suspend and resume issue.
As gpmc is not causing hangs based on tests with BeagleBone, let's patch gpmc separately. For gpmc, we also need a hardware reset done before restore according to Dave.
To reinit the modules, we decouple system suspend from PM runtime. We replace calls to pm_runtime_force_suspend() and pm_runtime_force_resume() with direct calls to internal functions and rely on the driver internal state. There no point trying to handle complex system suspend and resume quirks via PM runtime.
This is issue should have already been noticed with commit 1819ef2e2d12 ("bus: ti-sysc: Use swsup quirks also for am335x musb") when quirk handling was added for am335x otg for swsup. But the issue went unnoticed as having musb driver loaded hides the issue, and suspend and resume works once without the driver loaded.
Fixes: 1819ef2e2d12 ("bus: ti-sysc: Use swsup quirks also for am335x musb") Suggested-by: Dave Gerlach <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5 |
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| #
cfeeea60 |
| 16-Nov-2020 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Implement GPMC debug quirk to drop platform data
We need to enable no-reset-on-init quirk for GPMC if the config option for CONFIG_OMAP_GPMC_DEBUG is set. Otherwise the GPMC driver cod
bus: ti-sysc: Implement GPMC debug quirk to drop platform data
We need to enable no-reset-on-init quirk for GPMC if the config option for CONFIG_OMAP_GPMC_DEBUG is set. Otherwise the GPMC driver code is unable to show the bootloader configured timings.
Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.10-rc4, v5.10-rc3, v5.10-rc2 |
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e275d210 |
| 26-Oct-2020 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Fix reset status check for modules with quirks
Commit d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") started showing a "OCP softreset timed
bus: ti-sysc: Fix reset status check for modules with quirks
Commit d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") started showing a "OCP softreset timed out" warning on enable if the interconnect target module is not out of reset. This caused the warning to be often triggered for i2c and hdq while the devices are working properly.
Turns out that some interconnect target modules seem to have an unusable reset status bits unless the module specific reset quirks are activated.
Let's just skip the reset status check for those modules as we only want to activate the reset quirks when doing a reset, and not on enable. This way we don't see the bogus "OCP softreset timed out" warnings during boot.
Fixes: d46f9fbec719 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit") Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4 |
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b2745d92 |
| 27-Feb-2020 |
Suman Anna <[email protected]> |
bus: ti-sysc: Add support for PRUSS SYSC type
The PRU-ICSS present on AM33xx/AM43xx/AM57xx has a very unique SYSCFG register. The register follows the OMAP4-style SYSC_TYPE3 for Master Standby and S
bus: ti-sysc: Add support for PRUSS SYSC type
The PRU-ICSS present on AM33xx/AM43xx/AM57xx has a very unique SYSCFG register. The register follows the OMAP4-style SYSC_TYPE3 for Master Standby and Slave Idle, but also has two additional unique fields - STANDBY_INIT and SUB_MWAIT. The STANDBY_INIT is a control bit that is used to initiate a Standby sequence (when set) and trigger a MStandby request to the SoC's PRCM module. This same bit is also used to enable the OCP master ports (when cleared) to allow the PRU cores to access any peripherals or memory beyond the PRU subsystem. The SUB_MWAIT is a ready status field for the external access.
Add support for this SYSC type. The STANDBY_INIT has to be set during suspend, without which it results in a hang in the resume sequence on AM33xx/AM43xx boards and requires a board reset to come out of the hang. Any PRU applications requiring external access are supposed to clear the STANDBY_INIT bit. Note that the PRUSS context is lost during a suspend sequence because the PRUSS module is reset and/or disabled.
Signed-off-by: Suman Anna <[email protected]> Signed-off-by: Roger Quadros <[email protected]> [[email protected]: updated quirk define number and to use -ENODEV] Signed-off-by: Tony Lindgren <[email protected]>
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7324a7a0 |
| 24-Feb-2020 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Implement display subsystem reset quirk
The display subsystem (DSS) needs the child outputs disabled for reset. In order to prepare to probe DSS without legacy platform data, let's imp
bus: ti-sysc: Implement display subsystem reset quirk
The display subsystem (DSS) needs the child outputs disabled for reset. In order to prepare to probe DSS without legacy platform data, let's implement sysc_pre_reset_quirk_dss() similar to what we have for the platform data with omap_dss_reset().
Note that we cannot directly use the old omap_dss_reset() without platform data callbacks and updating omap_dss_reset() to understand struct device. And we will be dropping omap_dss_reset() anyways when all the SoCs are probing with device tree, so let's not mess with the legacy code at all.
Cc: Jyri Sarha <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Tomi Valkeinen <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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e8639e1c |
| 24-Feb-2020 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Handle module unlock quirk needed for some RTC
The RTC modules on am3 and am4 need quirk handling to unlock and lock them for reset so let's add the quirk handling based on what we alr
bus: ti-sysc: Handle module unlock quirk needed for some RTC
The RTC modules on am3 and am4 need quirk handling to unlock and lock them for reset so let's add the quirk handling based on what we already have for legacy platform data. In later patches we will simply drop the RTC related platform data and the old quirk handling.
Signed-off-by: Tony Lindgren <[email protected]>
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feaa8bae |
| 24-Feb-2020 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Implement SoC revision handling
We need to know SoC type and features for cases where the same SoC may be installed in various versions on the same board and would need a separate dts
bus: ti-sysc: Implement SoC revision handling
We need to know SoC type and features for cases where the same SoC may be installed in various versions on the same board and would need a separate dts file otherwise for the different variants.
For example, am3703 is pin compatible with omap3630, but has sgx and iva accelerators disabled. We must not try to access the sgx or iva module registers on am3703, and need to set the unavailable devices disabled early.
Let's also detect omap3430 as that is needed for display subsystem (DSS) reset later on, and GP vs EMU or HS devices. Further SoC specific disabled device detection can be added as needed, such as dra71x vs dra76x rtc and usb4.
Cc: Adam Ford <[email protected]> Cc: André Hentschel <[email protected]> Cc: H. Nikolaus Schaller <[email protected]> Cc: Keerthy <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2 |
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| #
94f63457 |
| 12-Dec-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Implement quirk handling for CLKDM_NOAUTO
For dra7 dcan and dwc3 instances we need to block clockdomain autoidle. Let's do this with CLKDM_NOAUTO quirk flag and enable it for dcan and
bus: ti-sysc: Implement quirk handling for CLKDM_NOAUTO
For dra7 dcan and dwc3 instances we need to block clockdomain autoidle. Let's do this with CLKDM_NOAUTO quirk flag and enable it for dcan and dwc3.
Cc: Keerthy <[email protected]> Cc: Roger Quadros <[email protected]> Cc: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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93c60483 |
| 09-Dec-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Fix missing force mstandby quirk handling
Commit 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") added quirk handling for mstandby quirk but did not consider t
bus: ti-sysc: Fix missing force mstandby quirk handling
Commit 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") added quirk handling for mstandby quirk but did not consider that we also need a quirk variant for SYSC_QUIRK_FORCE_MSTANDBY.
We need to use forced idle mode for both SYSC_QUIRK_SWSUP_MSTANDBY and SYSC_QUIRK_FORCE_MSTANDBY, but SYSC_QUIRK_SWSUP_MSTANDBY also need to additionally also configure no-idle mode when enabled.
Fixes: 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.5-rc1, v5.4, v5.4-rc8 |
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| #
020003f7 |
| 14-Nov-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Add module enable quirk for audio AESS
We must set the autogating bit on enable for AESS (Audio Engine SubSystem) when probed with ti-sysc interconnect target module driver. Otherwise
bus: ti-sysc: Add module enable quirk for audio AESS
We must set the autogating bit on enable for AESS (Audio Engine SubSystem) when probed with ti-sysc interconnect target module driver. Otherwise it won't idle properly.
Cc: Peter Ujfalusi <[email protected]> Tested-by: Peter Ujfalusi <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5 |
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| #
d7f563db |
| 14-Aug-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Add module enable quirk for SGX on omap36xx
Add module enable quirk for SGX needed on omap36xx.
Cc: Adam Ford <[email protected]> Cc: Filip Matijević <[email protected]> C
bus: ti-sysc: Add module enable quirk for SGX on omap36xx
Add module enable quirk for SGX needed on omap36xx.
Cc: Adam Ford <[email protected]> Cc: Filip Matijević <[email protected]> Cc: "H. Nikolaus Schaller" <[email protected]> Cc: Ivaylo Dimitrov <[email protected]> Cc: moaz korena <[email protected]> Cc: Merlijn Wajer <[email protected]> Cc: Paweł Chmiel <[email protected]> Cc: Philipp Rossak <[email protected]> Cc: Tomi Valkeinen <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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b58056da |
| 13-Aug-2019 |
Suman Anna <[email protected]> |
bus: ti-sysc: Add missing kerneldoc comments
A few fields in various structures is missing the corresponding kerneldoc comments. Add them. Also, fixed the comment for sidlemodes.
Signed-off-by: Sum
bus: ti-sysc: Add missing kerneldoc comments
A few fields in various structures is missing the corresponding kerneldoc comments. Add them. Also, fixed the comment for sidlemodes.
Signed-off-by: Suman Anna <[email protected]> Acked-by: Roger Quadros <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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54d66222 |
| 13-Aug-2019 |
Suman Anna <[email protected]> |
bus: ti-sysc: Switch to SPDX license identifier
Use the appropriate SPDX license identifier in the TI sysc interconnect target driver source files and drop the previous boilerplate license text. Als
bus: ti-sysc: Switch to SPDX license identifier
Use the appropriate SPDX license identifier in the TI sysc interconnect target driver source files and drop the previous boilerplate license text. Also, add the the SPDX license identifier in the associated ti-sysc header files.
Signed-off-by: Suman Anna <[email protected]> Acked-by: Roger Quadros <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5 |
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| #
4e23be47 |
| 10-Jun-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Add support for module specific reset quirks
Some older interconnect target modules need module internal clock toggling quirks to reset properly. We've been doing this in the platform
bus: ti-sysc: Add support for module specific reset quirks
Some older interconnect target modules need module internal clock toggling quirks to reset properly. We've been doing this in the platform code earlier, but need to be able to it directly in the ti-sysc driver when we no longer rely on on the platform code.
Let's add reset handling for 1-wire, i2c and watchdog. Later on we can add more modules like msdi and dss as they get tested. For dra7 pcie, we should be able to just use the rstctrl reset driver when available.
Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.2-rc4, v5.2-rc3 |
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| #
e0db94fe |
| 27-May-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits
We've had minimal OCP softreset support in ti-sysc interconnect target module driver only used for MCAN driver so far. But it
bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits
We've had minimal OCP softreset support in ti-sysc interconnect target module driver only used for MCAN driver so far. But it turns out that MCAN has the sysstatus register resetdone bit inverted compared to most other modules.
Let's make OCP softreset work for other typical cases with reset status in sysstatus or sysconfig register so we can use the new functions for sysc_enable_module() and sysc_disable_module() without "ti,hwmods" property in the following patches.
Tested-by: Keerthy <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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2b2f7def |
| 27-May-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Add support for missing clockdomain handling
We need to let ti-sysc driver manage clockdomain autoidle for the duration of of reset, enable and idle. And we need to do it before we ena
bus: ti-sysc: Add support for missing clockdomain handling
We need to let ti-sysc driver manage clockdomain autoidle for the duration of of reset, enable and idle. And we need to do it before we enable the clock and after we disable it. Currently we are still relying on platform callbacks indirectly managing clockdomain autoidle. But I noticed that for device tree only probed drivers it now happens only after we enabling the clocks and before we disable the clocks, while it should be the other way around. So far I have not noticed any issues with this though.
Let's add new ti_sysc_clkdm_deny_idle() and ti_sysc_clkdm_allow_idle() functions for ti-sysc driver to use to manage clockdomains directly via platform data callbacks. Note that we can implement the clockdomain functions in pdata-quirks.c as for probing devices without "ti,hwmods" custom property we don't need to use the other platform data callbacks.
Let's do this in one patch as there's is still an unlikely chance we may need to apply this as a fix for v5.2 for dropping legacy platform data for some devices. We also do have the option of adding back the platform data if needed in case of trouble.
Tested-by: Keerthy <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2 |
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| #
b4a9a7a3 |
| 21-Mar-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Handle swsup idle mode quirks
In preparation of dropping interconnect target module platform data in favor of devicetree based data, we must pass swsup idle quirks to the platform data
bus: ti-sysc: Handle swsup idle mode quirks
In preparation of dropping interconnect target module platform data in favor of devicetree based data, we must pass swsup idle quirks to the platform data functions.
For now, let's only tag the UART modules with the SWSUP_SIDLE_ACT quirk. The other modules will get tagged with swsup quirks as we drop the platform data and test the changes.
Signed-off-by: Tony Lindgren <[email protected]>
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| #
a54275f4 |
| 21-Mar-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Add quirk handling for external optional functional clock
We cannot access mcpdm registers at all unless there is an optional pdmclk configured. As this is currently only needed for mc
bus: ti-sysc: Add quirk handling for external optional functional clock
We cannot access mcpdm registers at all unless there is an optional pdmclk configured. As this is currently only needed for mcpdm, let's check for mcpdm in sysc_get_clocks(). If it turns out to be needed for other modules too, we can add more flags to the quirks table for this.
Signed-off-by: Tony Lindgren <[email protected]>
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386cb766 |
| 22-Mar-2019 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-init
We have ti,no-idle in use in addition to ti,no-idle-on-init but we're missing handling for it in the ti-sysc interconnect
bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-init
We have ti,no-idle in use in addition to ti,no-idle-on-init but we're missing handling for it in the ti-sysc interconnect target module driver.
Let's also group the idle defines together and update the binding documentation for it.
Cc: [email protected] Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6 |
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40d9f912 |
| 24-Sep-2018 |
Tony Lindgren <[email protected]> |
bus: ti-sysc: Defer suspend as needed
We don't care when we suspend but some our children do. In order to avoid tagging various modules with SYSC_QUIRK_RESOURCE_PROVIDER, let's do it automatically b
bus: ti-sysc: Defer suspend as needed
We don't care when we suspend but some our children do. In order to avoid tagging various modules with SYSC_QUIRK_RESOURCE_PROVIDER, let's do it automatically by tagging modules that are busy on suspend for noirq suspend. This way we can just do module detection on define DEBUG.
Note that we still need to keep SYSC_QUIRK_LEGACY_IDLE flag around so the our legacy single-child devices that set pm_runtime_irq_safe() can manage the interconnect target module themselves.
Signed-off-by: Tony Lindgren <[email protected]>
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Revision tags: v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5 |
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7f35e63d |
| 09-Jul-2018 |
Faiz Abbas <[email protected]> |
bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x
The dra76x MCAN generic interconnect module has a its own format for the bits in the control registers.
Therefore add a new module typ
bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x
The dra76x MCAN generic interconnect module has a its own format for the bits in the control registers.
Therefore add a new module type, new regbits and new capabilities specific to the MCAN module.
Acked-by: Rob Herring <[email protected]> CC: Tony Lindgren <[email protected]> Signed-off-by: Faiz Abbas <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
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