| 8a89e132 | 16-Apr-2023 |
Markus Elfring <[email protected]> |
drm/nouveau/pci: Move an expression into a function call parameter in nvkm_pcie_set_link()
The variable “pbus” was read only once in the implementation of the function “nvkm_pcie_set_link”. Thus mov
drm/nouveau/pci: Move an expression into a function call parameter in nvkm_pcie_set_link()
The variable “pbus” was read only once in the implementation of the function “nvkm_pcie_set_link”. Thus move the usage of an expression into a parameter for a function call.
Signed-off-by: Markus Elfring <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Signed-off-by: Karol Herbst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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| 0fd189a9 | 25-Jan-2018 |
Lyude Paul <[email protected]> |
drm/nouveau: Move irq setup/teardown to pci ctor/dtor
For a while we've been having issues with seemingly random interrupts coming from nvidia cards when resuming them. Originally the fix for this w
drm/nouveau: Move irq setup/teardown to pci ctor/dtor
For a while we've been having issues with seemingly random interrupts coming from nvidia cards when resuming them. Originally the fix for this was thought to be just re-arming the MSI interrupt registers right after re-allocating our IRQs, however it seems a lot of what we do is both wrong and not even nessecary.
This was made apparent by what appeared to be a regression in the mainline kernel that started introducing suspend/resume issues for nouveau:
a0c9259dc4e1 (irq/matrix: Spread interrupts on allocation)
After this commit was introduced, we started getting interrupts from the GPU before we actually re-allocated our own IRQ (see references below) and assigned the IRQ handler. Investigating this turned out that the problem was not with the commit, but the fact that nouveau even free/allocates it's irqs before and after suspend/resume.
For starters: drivers in the linux kernel haven't had to handle freeing/re-allocating their IRQs during suspend/resume cycles for quite a while now. Nouveau seems to be one of the few drivers left that still does this, despite the fact there's no reason we actually need to since disabling interrupts from the device side should be enough, as the kernel is already smart enough to know to disable host-side interrupts for us before going into suspend. Since we were tearing down our IRQs by hand however, that means there was a short period during resume where interrupts could be received before we re-allocated our IRQ which would lead to us getting an unhandled IRQ. Since we never handle said IRQ and re-arm the interrupt registers, this would cause us to miss all of the interrupts from the GPU and cause our init process to start timing out on anything requiring interrupts.
So, since this whole setup/teardown every suspend/resume cycle is useless anyway, move irq setup/teardown into the pci subdev's ctor/dtor functions instead so they're only called at driver load and driver unload. This should fix most of the issues with pending interrupts on resume, along with getting suspend/resume for nouveau to work again.
As well, this probably means we can also just remove the msi rearm call inside nvkm_pci_init(). But since our main focus here is to fix suspend/resume before 4.15, we'll save that for a later patch.
Signed-off-by: Lyude Paul <[email protected]> Cc: Karol Herbst <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Mike Galbraith <[email protected]> Cc: [email protected] Signed-off-by: Ben Skeggs <[email protected]>
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| 3aba825f | 05-Jan-2016 |
Karol Herbst <[email protected]> |
drm/nouveau/pci: implement pcie speed change for kepler+
v2: rename functions v3: remove pcie2 accessors v6: fix alignement and line width, also remove useless code
Signed-off-by: Karol Herbst <nou
drm/nouveau/pci: implement pcie speed change for kepler+
v2: rename functions v3: remove pcie2 accessors v6: fix alignement and line width, also remove useless code
Signed-off-by: Karol Herbst <[email protected]>
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| bcc19d9b | 15-Sep-2015 |
Karol Herbst <[email protected]> |
drm/nouveau/pci: implement generic code for pcie speed change
v2: rename and group functions v4: change copyright information move printing of pcie speeds into oneinit, rename all pcie funct
drm/nouveau/pci: implement generic code for pcie speed change
v2: rename and group functions v4: change copyright information move printing of pcie speeds into oneinit, rename all pcie functions to nvkm_pcie_* don't try to raise the pcie version when no higher one is supported v5: revert Copyright changes and rename nvkm_pcie_raise_version to nvkm_pcie_set_version v6: remove some useless pci_is_pcie checks and rework messages
Signed-off-by: Karol Herbst <[email protected]>
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| 5d5b43f5 | 03-Oct-2015 |
Pierre Moreau <[email protected]> |
drm/nouveau/pci: Handle 5-bit and 8-bit tag field
If the hardware supports extended tag field (8-bit ones), then enable it.
This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).
drm/nouveau/pci: Handle 5-bit and 8-bit tag field
If the hardware supports extended tag field (8-bit ones), then enable it.
This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).
In case extended tag field is not supported, 5-bit tag field is used which limits the possible number of requests to 32. Apparently bits 7:0 of 0x08841c stores some number of outstanding requests, so cap it to 32 if extended tag is unsupported.
Fixes: fdo#86537
v2: Restrict changes to chipsets >= 0x84 v3: * Add nvkm_pci_mask to pci.h * Mask bit 8 before setting it v4: * Rename `add` argument of nvkm_pci_mask to `value` * Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset checks v5: * Rebase code on latest PCI structure * Restore PCIe check * Fix namings in nvkm_pci_mask * Rephrase part of the commit message
Signed-off-by: Pierre Moreau <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
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