drm/amd/display: w/a to program DISPCLK_R_GATE_DISABLE DCN35[WHY & HOW]Cursor corruption observed on USBC display with specific system setup with areboot. Cursor memory might still in the lightsl
drm/amd/display: w/a to program DISPCLK_R_GATE_DISABLE DCN35[WHY & HOW]Cursor corruption observed on USBC display with specific system setup with areboot. Cursor memory might still in the lightsleep state due to voltageissue, we need program DISPCLK_R_GATE_DISABLE to avoid this issue only onDCN35.Reviewed-by: Nicholas Kazlauskas <[email protected]>Signed-off-by: Yihan Zhu <[email protected]>Signed-off-by: Wayne Lin <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
show more ...
drm/amd/display: correct register Clock Gater incorrectly disabled[why]The "dpp35_dppclk_control" routine is incorrectly disabling the register clock gaterwhen the DPP is enabled.The "DISPCLK_R
drm/amd/display: correct register Clock Gater incorrectly disabled[why]The "dpp35_dppclk_control" routine is incorrectly disabling the register clock gaterwhen the DPP is enabled.The "DISPCLK_R_GATE_DISABLE" should never be set to 1 in the normal operating mode.This will disable the clock gater and the DPPCLK register clock branch will always be running.As a consequence, the dynamic power will be higher than expected.Reviewed-by: Alvin Lee <[email protected]>Signed-off-by: Charlene Liu <[email protected]>Signed-off-by: Aurabindo Pillai <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Implement bias and scale pre sclwhy:New scaler needs the input to be full range color space. This will also fixissues that come up due to not having a predefined limited color sp
drm/amd/display: Implement bias and scale pre sclwhy:New scaler needs the input to be full range color space. This will also fixissues that come up due to not having a predefined limited color space matrixfor certain color spaceshow:Use bias and scale HW to expand the range of limited color spaces to fullbefore the scalerReviewed-by: Krunoslav Kovac <[email protected]>Signed-off-by: Jerry Zuo <[email protected]>Signed-off-by: Relja Vojvodic <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Remove unnecessary files[Why & How]We accidentally upstream unnecessary files. Remove them.Reviewed-by: Tom Chung <[email protected]>Signed-off-by: Wayne Lin <Wayne.Lin@a
drm/amd/display: Remove unnecessary files[Why & How]We accidentally upstream unnecessary files. Remove them.Reviewed-by: Tom Chung <[email protected]>Signed-off-by: Wayne Lin <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Toggle additional RCO options in DCN35[Why]With root clock optimization now enabled for DCN35 thereare still RCO registers still not being toggled[How]Add in logic to toggle R
drm/amd/display: Toggle additional RCO options in DCN35[Why]With root clock optimization now enabled for DCN35 thereare still RCO registers still not being toggled[How]Add in logic to toggle RCO registers for DPPCLK,DPSTREAMCLK and DSCCLKReviewed-by: Charlene Liu <[email protected]>Acked-by: Roman Li <[email protected]>Signed-off-by: Daniel Miess <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>
drm/amd/display: Refactor DPP into a component directory[WHY & HOW]Move all dpp files to a new dpp directory.Reviewed-by: Martin Leung <[email protected]>Acked-by: Alex Hung <[email protected]
drm/amd/display: Refactor DPP into a component directory[WHY & HOW]Move all dpp files to a new dpp directory.Reviewed-by: Martin Leung <[email protected]>Acked-by: Alex Hung <[email protected]>Signed-off-by: Revalla Hari Krishna <[email protected]>Tested-by: Daniel Wheeler <[email protected]>Signed-off-by: Alex Deucher <[email protected]>