1 //=- WebAssemblyISelLowering.cpp - WebAssembly DAG Lowering Implementation -==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This file implements the WebAssemblyTargetLowering class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "WebAssemblyISelLowering.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "WebAssemblyMachineFunctionInfo.h"
18 #include "WebAssemblySubtarget.h"
19 #include "WebAssemblyTargetMachine.h"
20 #include "WebAssemblyTargetObjectFile.h"
21 #include "llvm/CodeGen/Analysis.h"
22 #include "llvm/CodeGen/CallingConvLower.h"
23 #include "llvm/CodeGen/MachineJumpTableInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/SelectionDAG.h"
26 #include "llvm/IR/DiagnosticInfo.h"
27 #include "llvm/IR/DiagnosticPrinter.h"
28 #include "llvm/IR/Function.h"
29 #include "llvm/IR/Intrinsics.h"
30 #include "llvm/Support/CommandLine.h"
31 #include "llvm/Support/Debug.h"
32 #include "llvm/Support/ErrorHandling.h"
33 #include "llvm/Support/raw_ostream.h"
34 #include "llvm/Target/TargetOptions.h"
35 
36 using namespace llvm;
37 
38 #define DEBUG_TYPE "wasm-lower"
39 
40 namespace {
41 // Diagnostic information for unimplemented or unsupported feature reporting.
42 // FIXME copied from BPF and AMDGPU.
43 class DiagnosticInfoUnsupported : public DiagnosticInfo {
44 private:
45   // Debug location where this diagnostic is triggered.
46   DebugLoc DLoc;
47   const Twine &Description;
48   const Function &Fn;
49   SDValue Value;
50 
51   static int KindID;
52 
53   static int getKindID() {
54     if (KindID == 0)
55       KindID = llvm::getNextAvailablePluginDiagnosticKind();
56     return KindID;
57   }
58 
59 public:
60   DiagnosticInfoUnsupported(SDLoc DLoc, const Function &Fn, const Twine &Desc,
61                             SDValue Value)
62       : DiagnosticInfo(getKindID(), DS_Error), DLoc(DLoc.getDebugLoc()),
63         Description(Desc), Fn(Fn), Value(Value) {}
64 
65   void print(DiagnosticPrinter &DP) const override {
66     std::string Str;
67     raw_string_ostream OS(Str);
68 
69     if (DLoc) {
70       auto DIL = DLoc.get();
71       StringRef Filename = DIL->getFilename();
72       unsigned Line = DIL->getLine();
73       unsigned Column = DIL->getColumn();
74       OS << Filename << ':' << Line << ':' << Column << ' ';
75     }
76 
77     OS << "in function " << Fn.getName() << ' ' << *Fn.getFunctionType() << '\n'
78        << Description;
79     if (Value)
80       Value->print(OS);
81     OS << '\n';
82     OS.flush();
83     DP << Str;
84   }
85 
86   static bool classof(const DiagnosticInfo *DI) {
87     return DI->getKind() == getKindID();
88   }
89 };
90 
91 int DiagnosticInfoUnsupported::KindID = 0;
92 } // end anonymous namespace
93 
94 WebAssemblyTargetLowering::WebAssemblyTargetLowering(
95     const TargetMachine &TM, const WebAssemblySubtarget &STI)
96     : TargetLowering(TM), Subtarget(&STI) {
97   auto MVTPtr = Subtarget->hasAddr64() ? MVT::i64 : MVT::i32;
98 
99   // Booleans always contain 0 or 1.
100   setBooleanContents(ZeroOrOneBooleanContent);
101   // WebAssembly does not produce floating-point exceptions on normal floating
102   // point operations.
103   setHasFloatingPointExceptions(false);
104   // We don't know the microarchitecture here, so just reduce register pressure.
105   setSchedulingPreference(Sched::RegPressure);
106   // Tell ISel that we have a stack pointer.
107   setStackPointerRegisterToSaveRestore(
108       Subtarget->hasAddr64() ? WebAssembly::SP64 : WebAssembly::SP32);
109   // Set up the register classes.
110   addRegisterClass(MVT::i32, &WebAssembly::I32RegClass);
111   addRegisterClass(MVT::i64, &WebAssembly::I64RegClass);
112   addRegisterClass(MVT::f32, &WebAssembly::F32RegClass);
113   addRegisterClass(MVT::f64, &WebAssembly::F64RegClass);
114   // Compute derived properties from the register classes.
115   computeRegisterProperties(Subtarget->getRegisterInfo());
116 
117   setOperationAction(ISD::GlobalAddress, MVTPtr, Custom);
118   setOperationAction(ISD::JumpTable, MVTPtr, Custom);
119 
120   for (auto T : {MVT::f32, MVT::f64}) {
121     // Don't expand the floating-point types to constant pools.
122     setOperationAction(ISD::ConstantFP, T, Legal);
123     // Expand floating-point comparisons.
124     for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
125                     ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE})
126       setCondCodeAction(CC, T, Expand);
127     // Expand floating-point library function operators.
128     for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW})
129       setOperationAction(Op, T, Expand);
130     // Note supported floating-point library function operators that otherwise
131     // default to expand.
132     for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT,
133                     ISD::FRINT})
134       setOperationAction(Op, T, Legal);
135   }
136 
137   for (auto T : {MVT::i32, MVT::i64}) {
138     // Expand unavailable integer operations.
139     for (auto Op : {ISD::BSWAP, ISD::ROTL, ISD::ROTR,
140                     ISD::SMUL_LOHI, ISD::UMUL_LOHI,
141                     ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM,
142                     ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
143                     ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) {
144       setOperationAction(Op, T, Expand);
145     }
146   }
147 
148   // As a special case, these operators use the type to mean the type to
149   // sign-extend from.
150   for (auto T : {MVT::i1, MVT::i8, MVT::i16})
151     setOperationAction(ISD::SIGN_EXTEND_INREG, T, Expand);
152 
153   // Dynamic stack allocation: use the default expansion.
154   setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
155   setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
156   setOperationAction(ISD::DYNAMIC_STACKALLOC, MVTPtr, Expand);
157 
158   // Expand these forms; we pattern-match the forms that we can handle in isel.
159   for (auto T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
160     for (auto Op : {ISD::BR_CC, ISD::SELECT_CC})
161       setOperationAction(Op, T, Expand);
162 
163   // We have custom switch handling.
164   setOperationAction(ISD::BR_JT, MVT::Other, Custom);
165 
166   // WebAssembly doesn't have:
167   //  - Floating-point extending loads.
168   //  - Floating-point truncating stores.
169   //  - i1 extending loads.
170   setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f64, Expand);
171   setTruncStoreAction(MVT::f64, MVT::f32, Expand);
172   for (auto T : MVT::integer_valuetypes())
173     for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD})
174       setLoadExtAction(Ext, T, MVT::i1, Promote);
175 
176   // Trap lowers to wasm unreachable
177   setOperationAction(ISD::TRAP, MVT::Other, Legal);
178 }
179 
180 FastISel *WebAssemblyTargetLowering::createFastISel(
181     FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo) const {
182   return WebAssembly::createFastISel(FuncInfo, LibInfo);
183 }
184 
185 bool WebAssemblyTargetLowering::isOffsetFoldingLegal(
186     const GlobalAddressSDNode *GA) const {
187   // The WebAssembly target doesn't support folding offsets into global
188   // addresses.
189   return false;
190 }
191 
192 MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
193                                                       EVT VT) const {
194   return VT.getSimpleVT();
195 }
196 
197 const char *
198 WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
199   switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
200   case WebAssemblyISD::FIRST_NUMBER:
201     break;
202 #define HANDLE_NODETYPE(NODE)                                                  \
203   case WebAssemblyISD::NODE:                                                   \
204     return "WebAssemblyISD::" #NODE;
205 #include "WebAssemblyISD.def"
206 #undef HANDLE_NODETYPE
207   }
208   return nullptr;
209 }
210 
211 //===----------------------------------------------------------------------===//
212 // WebAssembly Lowering private implementation.
213 //===----------------------------------------------------------------------===//
214 
215 //===----------------------------------------------------------------------===//
216 // Lowering Code
217 //===----------------------------------------------------------------------===//
218 
219 static void fail(SDLoc DL, SelectionDAG &DAG, const char *msg) {
220   MachineFunction &MF = DAG.getMachineFunction();
221   DAG.getContext()->diagnose(
222       DiagnosticInfoUnsupported(DL, *MF.getFunction(), msg, SDValue()));
223 }
224 
225 SDValue
226 WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
227                                      SmallVectorImpl<SDValue> &InVals) const {
228   SelectionDAG &DAG = CLI.DAG;
229   SDLoc DL = CLI.DL;
230   SDValue Chain = CLI.Chain;
231   SDValue Callee = CLI.Callee;
232   MachineFunction &MF = DAG.getMachineFunction();
233 
234   CallingConv::ID CallConv = CLI.CallConv;
235   if (CallConv != CallingConv::C &&
236       CallConv != CallingConv::Fast &&
237       CallConv != CallingConv::Cold)
238     fail(DL, DAG,
239          "WebAssembly doesn't support language-specific or target-specific "
240          "calling conventions yet");
241   if (CLI.IsPatchPoint)
242     fail(DL, DAG, "WebAssembly doesn't support patch point yet");
243 
244   // WebAssembly doesn't currently support explicit tail calls. If they are
245   // required, fail. Otherwise, just disable them.
246   if ((CallConv == CallingConv::Fast && CLI.IsTailCall &&
247        MF.getTarget().Options.GuaranteedTailCallOpt) ||
248       (CLI.CS && CLI.CS->isMustTailCall()))
249     fail(DL, DAG, "WebAssembly doesn't support tail call yet");
250   CLI.IsTailCall = false;
251 
252   SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
253   SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
254 
255   bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet();
256   if (IsStructRet)
257     fail(DL, DAG, "WebAssembly doesn't support struct return yet");
258 
259   SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
260   if (Ins.size() > 1)
261     fail(DL, DAG, "WebAssembly doesn't support more than 1 returned value yet");
262 
263   bool IsVarArg = CLI.IsVarArg;
264   if (IsVarArg)
265     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
266 
267   // Analyze operands of the call, assigning locations to each operand.
268   SmallVector<CCValAssign, 16> ArgLocs;
269   CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
270   unsigned NumBytes = CCInfo.getNextStackOffset();
271 
272   auto PtrVT = getPointerTy(MF.getDataLayout());
273   auto Zero = DAG.getConstant(0, DL, PtrVT, true);
274   auto NB = DAG.getConstant(NumBytes, DL, PtrVT, true);
275   Chain = DAG.getCALLSEQ_START(Chain, NB, DL);
276 
277   SmallVector<SDValue, 16> Ops;
278   Ops.push_back(Chain);
279   Ops.push_back(Callee);
280   Ops.append(OutVals.begin(), OutVals.end());
281 
282   SmallVector<EVT, 8> Tys;
283   for (const auto &In : Ins)
284     Tys.push_back(In.VT);
285   Tys.push_back(MVT::Other);
286   SDVTList TyList = DAG.getVTList(Tys);
287   SDValue Res =
288       DAG.getNode(Ins.empty() ? WebAssemblyISD::CALL0 : WebAssemblyISD::CALL1,
289                   DL, TyList, Ops);
290   if (Ins.empty()) {
291     Chain = Res;
292   } else {
293     InVals.push_back(Res);
294     Chain = Res.getValue(1);
295   }
296 
297   // FIXME: handle CLI.RetSExt and CLI.RetZExt?
298 
299   Chain = DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), DL);
300 
301   return Chain;
302 }
303 
304 bool WebAssemblyTargetLowering::CanLowerReturn(
305     CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg,
306     const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
307   // WebAssembly can't currently handle returning tuples.
308   return Outs.size() <= 1;
309 }
310 
311 SDValue WebAssemblyTargetLowering::LowerReturn(
312     SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
313     const SmallVectorImpl<ISD::OutputArg> &Outs,
314     const SmallVectorImpl<SDValue> &OutVals, SDLoc DL,
315     SelectionDAG &DAG) const {
316 
317   assert(Outs.size() <= 1 && "WebAssembly can only return up to one value");
318   if (CallConv != CallingConv::C)
319     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
320   if (IsVarArg)
321     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
322 
323   SmallVector<SDValue, 4> RetOps(1, Chain);
324   RetOps.append(OutVals.begin(), OutVals.end());
325   Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps);
326 
327   return Chain;
328 }
329 
330 SDValue WebAssemblyTargetLowering::LowerFormalArguments(
331     SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
332     const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
333     SmallVectorImpl<SDValue> &InVals) const {
334   MachineFunction &MF = DAG.getMachineFunction();
335 
336   if (CallConv != CallingConv::C)
337     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
338   if (IsVarArg)
339     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
340   if (MF.getFunction()->hasStructRetAttr())
341     fail(DL, DAG, "WebAssembly doesn't support struct return yet");
342 
343   unsigned ArgNo = 0;
344   for (const ISD::InputArg &In : Ins) {
345     if (In.Flags.isZExt())
346       fail(DL, DAG, "WebAssembly hasn't implemented zext arguments");
347     if (In.Flags.isSExt())
348       fail(DL, DAG, "WebAssembly hasn't implemented sext arguments");
349     if (In.Flags.isInReg())
350       fail(DL, DAG, "WebAssembly hasn't implemented inreg arguments");
351     if (In.Flags.isSRet())
352       fail(DL, DAG, "WebAssembly hasn't implemented sret arguments");
353     if (In.Flags.isByVal())
354       fail(DL, DAG, "WebAssembly hasn't implemented byval arguments");
355     if (In.Flags.isInAlloca())
356       fail(DL, DAG, "WebAssembly hasn't implemented inalloca arguments");
357     if (In.Flags.isNest())
358       fail(DL, DAG, "WebAssembly hasn't implemented nest arguments");
359     if (In.Flags.isReturned())
360       fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
361     if (In.Flags.isInConsecutiveRegs())
362       fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
363     if (In.Flags.isInConsecutiveRegsLast())
364       fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
365     if (In.Flags.isSplit())
366       fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
367     // FIXME Do something with In.getOrigAlign()?
368     InVals.push_back(
369         In.Used
370             ? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
371                           DAG.getTargetConstant(ArgNo, DL, MVT::i32))
372             : DAG.getNode(ISD::UNDEF, DL, In.VT));
373     ++ArgNo;
374   }
375 
376   // Record the number of arguments, since argument indices and local variable
377   // indices are in the same index space.
378   MF.getInfo<WebAssemblyFunctionInfo>()->setNumArguments(ArgNo);
379 
380   return Chain;
381 }
382 
383 //===----------------------------------------------------------------------===//
384 //  Custom lowering hooks.
385 //===----------------------------------------------------------------------===//
386 
387 SDValue WebAssemblyTargetLowering::LowerOperation(SDValue Op,
388                                                   SelectionDAG &DAG) const {
389   switch (Op.getOpcode()) {
390   default:
391     llvm_unreachable("unimplemented operation lowering");
392     return SDValue();
393   case ISD::GlobalAddress:
394     return LowerGlobalAddress(Op, DAG);
395   case ISD::JumpTable:
396     return LowerJumpTable(Op, DAG);
397   case ISD::BR_JT:
398     return LowerBR_JT(Op, DAG);
399   }
400 }
401 
402 SDValue WebAssemblyTargetLowering::LowerGlobalAddress(SDValue Op,
403                                                       SelectionDAG &DAG) const {
404   SDLoc DL(Op);
405   const auto *GA = cast<GlobalAddressSDNode>(Op);
406   EVT VT = Op.getValueType();
407   assert(GA->getOffset() == 0 &&
408          "offsets on global addresses are forbidden by isOffsetFoldingLegal");
409   assert(GA->getTargetFlags() == 0 && "WebAssembly doesn't set target flags");
410   if (GA->getAddressSpace() != 0)
411     fail(DL, DAG, "WebAssembly only expects the 0 address space");
412   return DAG.getNode(WebAssemblyISD::Wrapper, DL, VT,
413                      DAG.getTargetGlobalAddress(GA->getGlobal(), DL, VT));
414 }
415 
416 SDValue WebAssemblyTargetLowering::LowerJumpTable(SDValue Op,
417                                                   SelectionDAG &DAG) const {
418   // There's no need for a Wrapper node because we always incorporate a jump
419   // table operand into a SWITCH instruction, rather than ever materializing
420   // it in a register.
421   const JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
422   return DAG.getTargetJumpTable(JT->getIndex(), Op.getValueType(),
423                                 JT->getTargetFlags());
424 }
425 
426 SDValue WebAssemblyTargetLowering::LowerBR_JT(SDValue Op,
427                                               SelectionDAG &DAG) const {
428   SDLoc DL(Op);
429   SDValue Chain = Op.getOperand(0);
430   const auto *JT = cast<JumpTableSDNode>(Op.getOperand(1));
431   SDValue Index = Op.getOperand(2);
432   assert(JT->getTargetFlags() == 0 && "WebAssembly doesn't set target flags");
433 
434   SmallVector<SDValue, 8> Ops;
435   Ops.push_back(Chain);
436   Ops.push_back(Index);
437 
438   MachineJumpTableInfo *MJTI = DAG.getMachineFunction().getJumpTableInfo();
439   const auto &MBBs = MJTI->getJumpTables()[JT->getIndex()].MBBs;
440 
441   // TODO: For now, we just pick something arbitrary for a default case for now.
442   // We really want to sniff out the guard and put in the real default case (and
443   // delete the guard).
444   Ops.push_back(DAG.getBasicBlock(MBBs[0]));
445 
446   // Add an operand for each case.
447   for (auto MBB : MBBs)
448     Ops.push_back(DAG.getBasicBlock(MBB));
449 
450   return DAG.getNode(WebAssemblyISD::SWITCH, DL, MVT::Other, Ops);
451 }
452 
453 //===----------------------------------------------------------------------===//
454 //                          WebAssembly Optimization Hooks
455 //===----------------------------------------------------------------------===//
456 
457 MCSection *WebAssemblyTargetObjectFile::SelectSectionForGlobal(
458     const GlobalValue *GV, SectionKind Kind, Mangler &Mang,
459     const TargetMachine &TM) const {
460   // TODO: Be more sophisticated than this.
461   return isa<Function>(GV) ? getTextSection() : getDataSection();
462 }
463