1 //=- WebAssemblyISelLowering.cpp - WebAssembly DAG Lowering Implementation -==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This file implements the WebAssemblyTargetLowering class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "WebAssemblyISelLowering.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "WebAssemblyMachineFunctionInfo.h"
18 #include "WebAssemblySubtarget.h"
19 #include "WebAssemblyTargetMachine.h"
20 #include "WebAssemblyTargetObjectFile.h"
21 #include "llvm/CodeGen/Analysis.h"
22 #include "llvm/CodeGen/CallingConvLower.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/SelectionDAG.h"
25 #include "llvm/IR/DiagnosticInfo.h"
26 #include "llvm/IR/DiagnosticPrinter.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/IR/Intrinsics.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/ErrorHandling.h"
32 #include "llvm/Support/raw_ostream.h"
33 #include "llvm/Target/TargetOptions.h"
34 
35 using namespace llvm;
36 
37 #define DEBUG_TYPE "wasm-lower"
38 
39 namespace {
40 // Diagnostic information for unimplemented or unsupported feature reporting.
41 // FIXME copied from BPF and AMDGPU.
42 class DiagnosticInfoUnsupported : public DiagnosticInfo {
43 private:
44   // Debug location where this diagnostic is triggered.
45   DebugLoc DLoc;
46   const Twine &Description;
47   const Function &Fn;
48   SDValue Value;
49 
50   static int KindID;
51 
52   static int getKindID() {
53     if (KindID == 0)
54       KindID = llvm::getNextAvailablePluginDiagnosticKind();
55     return KindID;
56   }
57 
58 public:
59   DiagnosticInfoUnsupported(SDLoc DLoc, const Function &Fn, const Twine &Desc,
60                             SDValue Value)
61       : DiagnosticInfo(getKindID(), DS_Error), DLoc(DLoc.getDebugLoc()),
62         Description(Desc), Fn(Fn), Value(Value) {}
63 
64   void print(DiagnosticPrinter &DP) const override {
65     std::string Str;
66     raw_string_ostream OS(Str);
67 
68     if (DLoc) {
69       auto DIL = DLoc.get();
70       StringRef Filename = DIL->getFilename();
71       unsigned Line = DIL->getLine();
72       unsigned Column = DIL->getColumn();
73       OS << Filename << ':' << Line << ':' << Column << ' ';
74     }
75 
76     OS << "in function " << Fn.getName() << ' ' << *Fn.getFunctionType() << '\n'
77        << Description;
78     if (Value)
79       Value->print(OS);
80     OS << '\n';
81     OS.flush();
82     DP << Str;
83   }
84 
85   static bool classof(const DiagnosticInfo *DI) {
86     return DI->getKind() == getKindID();
87   }
88 };
89 
90 int DiagnosticInfoUnsupported::KindID = 0;
91 } // end anonymous namespace
92 
93 WebAssemblyTargetLowering::WebAssemblyTargetLowering(
94     const TargetMachine &TM, const WebAssemblySubtarget &STI)
95     : TargetLowering(TM), Subtarget(&STI) {
96   auto MVTPtr = Subtarget->hasAddr64() ? MVT::i64 : MVT::i32;
97 
98   // Booleans always contain 0 or 1.
99   setBooleanContents(ZeroOrOneBooleanContent);
100   // WebAssembly does not produce floating-point exceptions on normal floating
101   // point operations.
102   setHasFloatingPointExceptions(false);
103   // We don't know the microarchitecture here, so just reduce register pressure.
104   setSchedulingPreference(Sched::RegPressure);
105   // Tell ISel that we have a stack pointer.
106   setStackPointerRegisterToSaveRestore(
107       Subtarget->hasAddr64() ? WebAssembly::SP64 : WebAssembly::SP32);
108   // Set up the register classes.
109   addRegisterClass(MVT::i32, &WebAssembly::Int32RegClass);
110   addRegisterClass(MVT::i64, &WebAssembly::Int64RegClass);
111   addRegisterClass(MVT::f32, &WebAssembly::Float32RegClass);
112   addRegisterClass(MVT::f64, &WebAssembly::Float64RegClass);
113   // Compute derived properties from the register classes.
114   computeRegisterProperties(Subtarget->getRegisterInfo());
115 
116   // FIXME: many setOperationAction are missing...
117 
118   setOperationAction(ISD::GlobalAddress, MVTPtr, Custom);
119 
120   for (auto T : {MVT::f32, MVT::f64}) {
121     // Don't expand the floating-point types to constant pools.
122     setOperationAction(ISD::ConstantFP, T, Legal);
123     // Expand floating-point comparisons.
124     for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
125                     ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE})
126       setCondCodeAction(CC, T, Expand);
127     // Expand floating-point library function operators.
128     for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW})
129       setOperationAction(Op, T, Expand);
130     // Note supported floating-point library function operators that otherwise
131     // default to expand.
132     for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT,
133                     ISD::FRINT})
134       setOperationAction(Op, T, Legal);
135   }
136 
137   for (auto T : {MVT::i32, MVT::i64}) {
138     // Expand unavailable integer operations.
139     for (auto Op : {ISD::BSWAP, ISD::ROTL, ISD::ROTR,
140                     ISD::SMUL_LOHI, ISD::UMUL_LOHI,
141                     ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM,
142                     ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
143                     ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) {
144       setOperationAction(Op, T, Expand);
145     }
146   }
147 
148   // As a special case, these operators use the type to mean the type to
149   // sign-extend from.
150   for (auto T : {MVT::i1, MVT::i8, MVT::i16})
151     setOperationAction(ISD::SIGN_EXTEND_INREG, T, Expand);
152 
153   // Dynamic stack allocation: use the default expansion.
154   setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
155   setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
156   setOperationAction(ISD::DYNAMIC_STACKALLOC, MVTPtr, Expand);
157 }
158 
159 FastISel *WebAssemblyTargetLowering::createFastISel(
160     FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo) const {
161   return WebAssembly::createFastISel(FuncInfo, LibInfo);
162 }
163 
164 bool WebAssemblyTargetLowering::isOffsetFoldingLegal(
165     const GlobalAddressSDNode *GA) const {
166   // The WebAssembly target doesn't support folding offsets into global
167   // addresses.
168   return false;
169 }
170 
171 MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
172                                                       EVT VT) const {
173   return VT.getSimpleVT();
174 }
175 
176 const char *
177 WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
178   switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
179   case WebAssemblyISD::FIRST_NUMBER:
180     break;
181 #define HANDLE_NODETYPE(NODE)                                                  \
182   case WebAssemblyISD::NODE:                                                   \
183     return "WebAssemblyISD::" #NODE;
184 #include "WebAssemblyISD.def"
185 #undef HANDLE_NODETYPE
186   }
187   return nullptr;
188 }
189 
190 //===----------------------------------------------------------------------===//
191 // WebAssembly Lowering private implementation.
192 //===----------------------------------------------------------------------===//
193 
194 //===----------------------------------------------------------------------===//
195 // Lowering Code
196 //===----------------------------------------------------------------------===//
197 
198 static void fail(SDLoc DL, SelectionDAG &DAG, const char *msg) {
199   MachineFunction &MF = DAG.getMachineFunction();
200   DAG.getContext()->diagnose(
201       DiagnosticInfoUnsupported(DL, *MF.getFunction(), msg, SDValue()));
202 }
203 
204 SDValue
205 WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
206                                      SmallVectorImpl<SDValue> &InVals) const {
207   SelectionDAG &DAG = CLI.DAG;
208   SDLoc DL = CLI.DL;
209   SDValue Chain = CLI.Chain;
210   SDValue Callee = CLI.Callee;
211   MachineFunction &MF = DAG.getMachineFunction();
212 
213   CallingConv::ID CallConv = CLI.CallConv;
214   if (CallConv != CallingConv::C)
215     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
216   if (CLI.IsTailCall || MF.getTarget().Options.GuaranteedTailCallOpt)
217     fail(DL, DAG, "WebAssembly doesn't support tail call yet");
218   if (CLI.IsPatchPoint)
219     fail(DL, DAG, "WebAssembly doesn't support patch point yet");
220 
221   SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
222   SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
223   bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet();
224   if (IsStructRet)
225     fail(DL, DAG, "WebAssembly doesn't support struct return yet");
226   if (Outs.size() > 1)
227     fail(DL, DAG, "WebAssembly doesn't support more than 1 returned value yet");
228 
229   SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
230   bool IsVarArg = CLI.IsVarArg;
231   if (IsVarArg)
232     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
233   // Analyze operands of the call, assigning locations to each operand.
234   SmallVector<CCValAssign, 16> ArgLocs;
235   CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
236   unsigned NumBytes = CCInfo.getNextStackOffset();
237 
238   auto PtrVT = getPointerTy(MF.getDataLayout());
239   auto Zero = DAG.getConstant(0, DL, PtrVT, true);
240   auto NB = DAG.getConstant(NumBytes, DL, PtrVT, true);
241   Chain = DAG.getCALLSEQ_START(Chain, NB, DL);
242 
243   SmallVector<SDValue, 16> Ops;
244   Ops.push_back(Chain);
245   Ops.push_back(Callee);
246   Ops.append(OutVals.begin(), OutVals.end());
247 
248   SmallVector<EVT, 8> Tys;
249   for (const auto &In : Ins)
250     Tys.push_back(In.VT);
251   Tys.push_back(MVT::Other);
252   SDVTList TyList = DAG.getVTList(Tys);
253   SDValue Res = DAG.getNode(WebAssemblyISD::CALL, DL, TyList, Ops);
254   if (Ins.empty()) {
255     Chain = Res;
256   } else {
257     InVals.push_back(Res);
258     Chain = Res.getValue(1);
259   }
260 
261   // FIXME: handle CLI.RetSExt and CLI.RetZExt?
262 
263   Chain = DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), DL);
264 
265   return Chain;
266 }
267 
268 bool WebAssemblyTargetLowering::CanLowerReturn(
269     CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg,
270     const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
271   // WebAssembly can't currently handle returning tuples.
272   return Outs.size() <= 1;
273 }
274 
275 SDValue WebAssemblyTargetLowering::LowerReturn(
276     SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
277     const SmallVectorImpl<ISD::OutputArg> &Outs,
278     const SmallVectorImpl<SDValue> &OutVals, SDLoc DL,
279     SelectionDAG &DAG) const {
280 
281   assert(Outs.size() <= 1 && "WebAssembly can only return up to one value");
282   if (CallConv != CallingConv::C)
283     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
284   if (IsVarArg)
285     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
286 
287   SmallVector<SDValue, 4> RetOps(1, Chain);
288   RetOps.append(OutVals.begin(), OutVals.end());
289   Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps);
290 
291   return Chain;
292 }
293 
294 SDValue WebAssemblyTargetLowering::LowerFormalArguments(
295     SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
296     const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
297     SmallVectorImpl<SDValue> &InVals) const {
298   MachineFunction &MF = DAG.getMachineFunction();
299 
300   if (CallConv != CallingConv::C)
301     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
302   if (IsVarArg)
303     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
304   if (MF.getFunction()->hasStructRetAttr())
305     fail(DL, DAG, "WebAssembly doesn't support struct return yet");
306 
307   unsigned ArgNo = 0;
308   for (const ISD::InputArg &In : Ins) {
309     if (In.Flags.isZExt())
310       fail(DL, DAG, "WebAssembly hasn't implemented zext arguments");
311     if (In.Flags.isSExt())
312       fail(DL, DAG, "WebAssembly hasn't implemented sext arguments");
313     if (In.Flags.isInReg())
314       fail(DL, DAG, "WebAssembly hasn't implemented inreg arguments");
315     if (In.Flags.isSRet())
316       fail(DL, DAG, "WebAssembly hasn't implemented sret arguments");
317     if (In.Flags.isByVal())
318       fail(DL, DAG, "WebAssembly hasn't implemented byval arguments");
319     if (In.Flags.isInAlloca())
320       fail(DL, DAG, "WebAssembly hasn't implemented inalloca arguments");
321     if (In.Flags.isNest())
322       fail(DL, DAG, "WebAssembly hasn't implemented nest arguments");
323     if (In.Flags.isReturned())
324       fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
325     if (In.Flags.isInConsecutiveRegs())
326       fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
327     if (In.Flags.isInConsecutiveRegsLast())
328       fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
329     if (In.Flags.isSplit())
330       fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
331     // FIXME Do something with In.getOrigAlign()?
332     InVals.push_back(
333         In.Used
334             ? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
335                           DAG.getTargetConstant(ArgNo, DL, MVT::i32))
336             : DAG.getNode(ISD::UNDEF, DL, In.VT));
337     ++ArgNo;
338   }
339 
340   return Chain;
341 }
342 
343 //===----------------------------------------------------------------------===//
344 //  Custom lowering hooks.
345 //===----------------------------------------------------------------------===//
346 
347 SDValue WebAssemblyTargetLowering::LowerOperation(SDValue Op,
348                                                   SelectionDAG &DAG) const {
349   switch (Op.getOpcode()) {
350   default:
351     llvm_unreachable("unimplemented operation lowering");
352     return SDValue();
353   case ISD::GlobalAddress:
354     return LowerGlobalAddress(Op, DAG);
355   }
356 }
357 
358 SDValue WebAssemblyTargetLowering::LowerGlobalAddress(SDValue Op,
359                                                       SelectionDAG &DAG) const {
360   SDLoc DL(Op);
361   const auto *GA = cast<GlobalAddressSDNode>(Op);
362   EVT VT = Op.getValueType();
363   assert(GA->getOffset() == 0 &&
364          "offsets on global addresses are forbidden by isOffsetFoldingLegal");
365   assert(GA->getTargetFlags() == 0 && "WebAssembly doesn't set target flags");
366   if (GA->getAddressSpace() != 0)
367     fail(DL, DAG, "WebAssembly only expects the 0 address space");
368   return DAG.getNode(WebAssemblyISD::Wrapper, DL, VT,
369                      DAG.getTargetGlobalAddress(GA->getGlobal(), DL, VT));
370 }
371 
372 //===----------------------------------------------------------------------===//
373 //                          WebAssembly Optimization Hooks
374 //===----------------------------------------------------------------------===//
375 
376 MCSection *WebAssemblyTargetObjectFile::SelectSectionForGlobal(
377     const GlobalValue *GV, SectionKind Kind, Mangler &Mang,
378     const TargetMachine &TM) const {
379   return getDataSection();
380 }
381