1 //=- WebAssemblyISelLowering.cpp - WebAssembly DAG Lowering Implementation -==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This file implements the WebAssemblyTargetLowering class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "WebAssemblyISelLowering.h"
16 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
17 #include "WebAssemblyMachineFunctionInfo.h"
18 #include "WebAssemblySubtarget.h"
19 #include "WebAssemblyTargetMachine.h"
20 #include "WebAssemblyTargetObjectFile.h"
21 #include "llvm/CodeGen/Analysis.h"
22 #include "llvm/CodeGen/CallingConvLower.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/SelectionDAG.h"
25 #include "llvm/IR/DiagnosticInfo.h"
26 #include "llvm/IR/DiagnosticPrinter.h"
27 #include "llvm/IR/Function.h"
28 #include "llvm/IR/Intrinsics.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/ErrorHandling.h"
32 #include "llvm/Support/raw_ostream.h"
33 #include "llvm/Target/TargetOptions.h"
34 
35 using namespace llvm;
36 
37 #define DEBUG_TYPE "wasm-lower"
38 
39 namespace {
40 // Diagnostic information for unimplemented or unsupported feature reporting.
41 // FIXME copied from BPF and AMDGPU.
42 class DiagnosticInfoUnsupported : public DiagnosticInfo {
43 private:
44   // Debug location where this diagnostic is triggered.
45   DebugLoc DLoc;
46   const Twine &Description;
47   const Function &Fn;
48   SDValue Value;
49 
50   static int KindID;
51 
52   static int getKindID() {
53     if (KindID == 0)
54       KindID = llvm::getNextAvailablePluginDiagnosticKind();
55     return KindID;
56   }
57 
58 public:
59   DiagnosticInfoUnsupported(SDLoc DLoc, const Function &Fn, const Twine &Desc,
60                             SDValue Value)
61       : DiagnosticInfo(getKindID(), DS_Error), DLoc(DLoc.getDebugLoc()),
62         Description(Desc), Fn(Fn), Value(Value) {}
63 
64   void print(DiagnosticPrinter &DP) const override {
65     std::string Str;
66     raw_string_ostream OS(Str);
67 
68     if (DLoc) {
69       auto DIL = DLoc.get();
70       StringRef Filename = DIL->getFilename();
71       unsigned Line = DIL->getLine();
72       unsigned Column = DIL->getColumn();
73       OS << Filename << ':' << Line << ':' << Column << ' ';
74     }
75 
76     OS << "in function " << Fn.getName() << ' ' << *Fn.getFunctionType() << '\n'
77        << Description;
78     if (Value)
79       Value->print(OS);
80     OS << '\n';
81     OS.flush();
82     DP << Str;
83   }
84 
85   static bool classof(const DiagnosticInfo *DI) {
86     return DI->getKind() == getKindID();
87   }
88 };
89 
90 int DiagnosticInfoUnsupported::KindID = 0;
91 } // end anonymous namespace
92 
93 WebAssemblyTargetLowering::WebAssemblyTargetLowering(
94     const TargetMachine &TM, const WebAssemblySubtarget &STI)
95     : TargetLowering(TM), Subtarget(&STI) {
96   auto MVTPtr = Subtarget->hasAddr64() ? MVT::i64 : MVT::i32;
97 
98   // Booleans always contain 0 or 1.
99   setBooleanContents(ZeroOrOneBooleanContent);
100   // WebAssembly does not produce floating-point exceptions on normal floating
101   // point operations.
102   setHasFloatingPointExceptions(false);
103   // We don't know the microarchitecture here, so just reduce register pressure.
104   setSchedulingPreference(Sched::RegPressure);
105   // Tell ISel that we have a stack pointer.
106   setStackPointerRegisterToSaveRestore(
107       Subtarget->hasAddr64() ? WebAssembly::SP64 : WebAssembly::SP32);
108   // Set up the register classes.
109   addRegisterClass(MVT::i32, &WebAssembly::Int32RegClass);
110   addRegisterClass(MVT::i64, &WebAssembly::Int64RegClass);
111   addRegisterClass(MVT::f32, &WebAssembly::Float32RegClass);
112   addRegisterClass(MVT::f64, &WebAssembly::Float64RegClass);
113   // Compute derived properties from the register classes.
114   computeRegisterProperties(Subtarget->getRegisterInfo());
115 
116   setOperationAction(ISD::GlobalAddress, MVTPtr, Custom);
117 
118   for (auto T : {MVT::f32, MVT::f64}) {
119     // Don't expand the floating-point types to constant pools.
120     setOperationAction(ISD::ConstantFP, T, Legal);
121     // Expand floating-point comparisons.
122     for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
123                     ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE})
124       setCondCodeAction(CC, T, Expand);
125     // Expand floating-point library function operators.
126     for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW})
127       setOperationAction(Op, T, Expand);
128     // Note supported floating-point library function operators that otherwise
129     // default to expand.
130     for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT,
131                     ISD::FRINT})
132       setOperationAction(Op, T, Legal);
133   }
134 
135   for (auto T : {MVT::i32, MVT::i64}) {
136     // Expand unavailable integer operations.
137     for (auto Op : {ISD::BSWAP, ISD::ROTL, ISD::ROTR,
138                     ISD::SMUL_LOHI, ISD::UMUL_LOHI,
139                     ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM,
140                     ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
141                     ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) {
142       setOperationAction(Op, T, Expand);
143     }
144   }
145 
146   // As a special case, these operators use the type to mean the type to
147   // sign-extend from.
148   for (auto T : {MVT::i1, MVT::i8, MVT::i16})
149     setOperationAction(ISD::SIGN_EXTEND_INREG, T, Expand);
150 
151   // Dynamic stack allocation: use the default expansion.
152   setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
153   setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
154   setOperationAction(ISD::DYNAMIC_STACKALLOC, MVTPtr, Expand);
155 
156   // WebAssembly doesn't have:
157   //  - Floating-point extending loads.
158   //  - Floating-point truncating stores.
159   //  - i1 extending loads.
160   setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f64, Expand);
161   setTruncStoreAction(MVT::f64, MVT::f32, Expand);
162   for (auto T : MVT::integer_valuetypes())
163     for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD})
164       setLoadExtAction(Ext, T, MVT::i1, Promote);
165 }
166 
167 FastISel *WebAssemblyTargetLowering::createFastISel(
168     FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo) const {
169   return WebAssembly::createFastISel(FuncInfo, LibInfo);
170 }
171 
172 bool WebAssemblyTargetLowering::isOffsetFoldingLegal(
173     const GlobalAddressSDNode *GA) const {
174   // The WebAssembly target doesn't support folding offsets into global
175   // addresses.
176   return false;
177 }
178 
179 MVT WebAssemblyTargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
180                                                       EVT VT) const {
181   return VT.getSimpleVT();
182 }
183 
184 const char *
185 WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const {
186   switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) {
187   case WebAssemblyISD::FIRST_NUMBER:
188     break;
189 #define HANDLE_NODETYPE(NODE)                                                  \
190   case WebAssemblyISD::NODE:                                                   \
191     return "WebAssemblyISD::" #NODE;
192 #include "WebAssemblyISD.def"
193 #undef HANDLE_NODETYPE
194   }
195   return nullptr;
196 }
197 
198 //===----------------------------------------------------------------------===//
199 // WebAssembly Lowering private implementation.
200 //===----------------------------------------------------------------------===//
201 
202 //===----------------------------------------------------------------------===//
203 // Lowering Code
204 //===----------------------------------------------------------------------===//
205 
206 static void fail(SDLoc DL, SelectionDAG &DAG, const char *msg) {
207   MachineFunction &MF = DAG.getMachineFunction();
208   DAG.getContext()->diagnose(
209       DiagnosticInfoUnsupported(DL, *MF.getFunction(), msg, SDValue()));
210 }
211 
212 SDValue
213 WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
214                                      SmallVectorImpl<SDValue> &InVals) const {
215   SelectionDAG &DAG = CLI.DAG;
216   SDLoc DL = CLI.DL;
217   SDValue Chain = CLI.Chain;
218   SDValue Callee = CLI.Callee;
219   MachineFunction &MF = DAG.getMachineFunction();
220 
221   CallingConv::ID CallConv = CLI.CallConv;
222   if (CallConv != CallingConv::C)
223     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
224   if (CLI.IsTailCall || MF.getTarget().Options.GuaranteedTailCallOpt)
225     fail(DL, DAG, "WebAssembly doesn't support tail call yet");
226   if (CLI.IsPatchPoint)
227     fail(DL, DAG, "WebAssembly doesn't support patch point yet");
228 
229   SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
230   SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
231 
232   bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet();
233   if (IsStructRet)
234     fail(DL, DAG, "WebAssembly doesn't support struct return yet");
235 
236   SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
237   if (Ins.size() > 1)
238     fail(DL, DAG, "WebAssembly doesn't support more than 1 returned value yet");
239 
240   bool IsVarArg = CLI.IsVarArg;
241   if (IsVarArg)
242     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
243 
244   // Analyze operands of the call, assigning locations to each operand.
245   SmallVector<CCValAssign, 16> ArgLocs;
246   CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
247   unsigned NumBytes = CCInfo.getNextStackOffset();
248 
249   auto PtrVT = getPointerTy(MF.getDataLayout());
250   auto Zero = DAG.getConstant(0, DL, PtrVT, true);
251   auto NB = DAG.getConstant(NumBytes, DL, PtrVT, true);
252   Chain = DAG.getCALLSEQ_START(Chain, NB, DL);
253 
254   SmallVector<SDValue, 16> Ops;
255   Ops.push_back(Chain);
256   Ops.push_back(Callee);
257   Ops.append(OutVals.begin(), OutVals.end());
258 
259   SmallVector<EVT, 8> Tys;
260   for (const auto &In : Ins)
261     Tys.push_back(In.VT);
262   Tys.push_back(MVT::Other);
263   SDVTList TyList = DAG.getVTList(Tys);
264   SDValue Res =
265       DAG.getNode(Ins.empty() ? WebAssemblyISD::CALL0 : WebAssemblyISD::CALL1,
266                   DL, TyList, Ops);
267   if (Ins.empty()) {
268     Chain = Res;
269   } else {
270     InVals.push_back(Res);
271     Chain = Res.getValue(1);
272   }
273 
274   // FIXME: handle CLI.RetSExt and CLI.RetZExt?
275 
276   Chain = DAG.getCALLSEQ_END(Chain, NB, Zero, SDValue(), DL);
277 
278   return Chain;
279 }
280 
281 bool WebAssemblyTargetLowering::CanLowerReturn(
282     CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg,
283     const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
284   // WebAssembly can't currently handle returning tuples.
285   return Outs.size() <= 1;
286 }
287 
288 SDValue WebAssemblyTargetLowering::LowerReturn(
289     SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
290     const SmallVectorImpl<ISD::OutputArg> &Outs,
291     const SmallVectorImpl<SDValue> &OutVals, SDLoc DL,
292     SelectionDAG &DAG) const {
293 
294   assert(Outs.size() <= 1 && "WebAssembly can only return up to one value");
295   if (CallConv != CallingConv::C)
296     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
297   if (IsVarArg)
298     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
299 
300   SmallVector<SDValue, 4> RetOps(1, Chain);
301   RetOps.append(OutVals.begin(), OutVals.end());
302   Chain = DAG.getNode(WebAssemblyISD::RETURN, DL, MVT::Other, RetOps);
303 
304   return Chain;
305 }
306 
307 SDValue WebAssemblyTargetLowering::LowerFormalArguments(
308     SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
309     const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
310     SmallVectorImpl<SDValue> &InVals) const {
311   MachineFunction &MF = DAG.getMachineFunction();
312 
313   if (CallConv != CallingConv::C)
314     fail(DL, DAG, "WebAssembly doesn't support non-C calling conventions");
315   if (IsVarArg)
316     fail(DL, DAG, "WebAssembly doesn't support varargs yet");
317   if (MF.getFunction()->hasStructRetAttr())
318     fail(DL, DAG, "WebAssembly doesn't support struct return yet");
319 
320   unsigned ArgNo = 0;
321   for (const ISD::InputArg &In : Ins) {
322     if (In.Flags.isZExt())
323       fail(DL, DAG, "WebAssembly hasn't implemented zext arguments");
324     if (In.Flags.isSExt())
325       fail(DL, DAG, "WebAssembly hasn't implemented sext arguments");
326     if (In.Flags.isInReg())
327       fail(DL, DAG, "WebAssembly hasn't implemented inreg arguments");
328     if (In.Flags.isSRet())
329       fail(DL, DAG, "WebAssembly hasn't implemented sret arguments");
330     if (In.Flags.isByVal())
331       fail(DL, DAG, "WebAssembly hasn't implemented byval arguments");
332     if (In.Flags.isInAlloca())
333       fail(DL, DAG, "WebAssembly hasn't implemented inalloca arguments");
334     if (In.Flags.isNest())
335       fail(DL, DAG, "WebAssembly hasn't implemented nest arguments");
336     if (In.Flags.isReturned())
337       fail(DL, DAG, "WebAssembly hasn't implemented returned arguments");
338     if (In.Flags.isInConsecutiveRegs())
339       fail(DL, DAG, "WebAssembly hasn't implemented cons regs arguments");
340     if (In.Flags.isInConsecutiveRegsLast())
341       fail(DL, DAG, "WebAssembly hasn't implemented cons regs last arguments");
342     if (In.Flags.isSplit())
343       fail(DL, DAG, "WebAssembly hasn't implemented split arguments");
344     // FIXME Do something with In.getOrigAlign()?
345     InVals.push_back(
346         In.Used
347             ? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
348                           DAG.getTargetConstant(ArgNo, DL, MVT::i32))
349             : DAG.getNode(ISD::UNDEF, DL, In.VT));
350     ++ArgNo;
351   }
352 
353   return Chain;
354 }
355 
356 //===----------------------------------------------------------------------===//
357 //  Custom lowering hooks.
358 //===----------------------------------------------------------------------===//
359 
360 SDValue WebAssemblyTargetLowering::LowerOperation(SDValue Op,
361                                                   SelectionDAG &DAG) const {
362   switch (Op.getOpcode()) {
363   default:
364     llvm_unreachable("unimplemented operation lowering");
365     return SDValue();
366   case ISD::GlobalAddress:
367     return LowerGlobalAddress(Op, DAG);
368   }
369 }
370 
371 SDValue WebAssemblyTargetLowering::LowerGlobalAddress(SDValue Op,
372                                                       SelectionDAG &DAG) const {
373   SDLoc DL(Op);
374   const auto *GA = cast<GlobalAddressSDNode>(Op);
375   EVT VT = Op.getValueType();
376   assert(GA->getOffset() == 0 &&
377          "offsets on global addresses are forbidden by isOffsetFoldingLegal");
378   assert(GA->getTargetFlags() == 0 && "WebAssembly doesn't set target flags");
379   if (GA->getAddressSpace() != 0)
380     fail(DL, DAG, "WebAssembly only expects the 0 address space");
381   return DAG.getNode(WebAssemblyISD::Wrapper, DL, VT,
382                      DAG.getTargetGlobalAddress(GA->getGlobal(), DL, VT));
383 }
384 
385 //===----------------------------------------------------------------------===//
386 //                          WebAssembly Optimization Hooks
387 //===----------------------------------------------------------------------===//
388 
389 MCSection *WebAssemblyTargetObjectFile::SelectSectionForGlobal(
390     const GlobalValue *GV, SectionKind Kind, Mangler &Mang,
391     const TargetMachine &TM) const {
392   return getDataSection();
393 }
394