1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Top-level implementation for the PowerPC target.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "PPCTargetMachine.h"
15 #include "PPC.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/MC/MCStreamer.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Support/TargetRegistry.h"
22 #include "llvm/Target/TargetOptions.h"
23 using namespace llvm;
24 
25 static cl::
26 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
27                         cl::desc("Disable CTR loops for PPC"));
28 
29 static cl::opt<bool>
30 VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
31   cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
32 
33 extern "C" void LLVMInitializePowerPCTarget() {
34   // Register the targets
35   RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
36   RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
37   RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
38 }
39 
40 static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL, StringRef TT) {
41   std::string FullFS = FS;
42   Triple TargetTriple(TT);
43 
44   // Make sure 64-bit features are available when CPUname is generic
45   if (TargetTriple.getArch() == Triple::ppc64 ||
46       TargetTriple.getArch() == Triple::ppc64le) {
47     if (!FullFS.empty())
48       FullFS = "+64bit," + FullFS;
49     else
50       FullFS = "+64bit";
51   }
52 
53   if (OL >= CodeGenOpt::Default) {
54     if (!FullFS.empty())
55       FullFS = "+crbits," + FullFS;
56     else
57       FullFS = "+crbits";
58   }
59   return FullFS;
60 }
61 
62 // The FeatureString here is a little subtle. We are modifying the feature string
63 // with what are (currently) non-function specific overrides as it goes into the
64 // LLVMTargetMachine constructor and then using the stored value in the
65 // Subtarget constructor below it.
66 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
67                                    StringRef FS, const TargetOptions &Options,
68                                    Reloc::Model RM, CodeModel::Model CM,
69                                    CodeGenOpt::Level OL)
70     : LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM,
71                         CM, OL),
72       Subtarget(TT, CPU, TargetFS, *this) {
73   initAsmInfo();
74 }
75 
76 void PPC32TargetMachine::anchor() { }
77 
78 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
79                                        StringRef CPU, StringRef FS,
80                                        const TargetOptions &Options,
81                                        Reloc::Model RM, CodeModel::Model CM,
82                                        CodeGenOpt::Level OL)
83   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
84 }
85 
86 void PPC64TargetMachine::anchor() { }
87 
88 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
89                                        StringRef CPU,  StringRef FS,
90                                        const TargetOptions &Options,
91                                        Reloc::Model RM, CodeModel::Model CM,
92                                        CodeGenOpt::Level OL)
93   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
94 }
95 
96 
97 //===----------------------------------------------------------------------===//
98 // Pass Pipeline Configuration
99 //===----------------------------------------------------------------------===//
100 
101 namespace {
102 /// PPC Code Generator Pass Configuration Options.
103 class PPCPassConfig : public TargetPassConfig {
104 public:
105   PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
106     : TargetPassConfig(TM, PM) {}
107 
108   PPCTargetMachine &getPPCTargetMachine() const {
109     return getTM<PPCTargetMachine>();
110   }
111 
112   const PPCSubtarget &getPPCSubtarget() const {
113     return *getPPCTargetMachine().getSubtargetImpl();
114   }
115 
116   void addIRPasses() override;
117   bool addPreISel() override;
118   bool addILPOpts() override;
119   bool addInstSelector() override;
120   bool addPreRegAlloc() override;
121   bool addPreSched2() override;
122   bool addPreEmitPass() override;
123 };
124 } // namespace
125 
126 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
127   return new PPCPassConfig(this, PM);
128 }
129 
130 void PPCPassConfig::addIRPasses() {
131   addPass(createAtomicExpandPass(&getPPCTargetMachine()));
132   TargetPassConfig::addIRPasses();
133 }
134 
135 bool PPCPassConfig::addPreISel() {
136   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
137     addPass(createPPCCTRLoops(getPPCTargetMachine()));
138 
139   return false;
140 }
141 
142 bool PPCPassConfig::addILPOpts() {
143   addPass(&EarlyIfConverterID);
144   return true;
145 }
146 
147 bool PPCPassConfig::addInstSelector() {
148   // Install an instruction selector.
149   addPass(createPPCISelDag(getPPCTargetMachine()));
150 
151 #ifndef NDEBUG
152   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
153     addPass(createPPCCTRLoopsVerify());
154 #endif
155 
156   addPass(createPPCVSXCopyPass());
157   return false;
158 }
159 
160 bool PPCPassConfig::addPreRegAlloc() {
161   initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
162   insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
163              &PPCVSXFMAMutateID);
164   return false;
165 }
166 
167 bool PPCPassConfig::addPreSched2() {
168   addPass(createPPCVSXCopyCleanupPass());
169 
170   if (getOptLevel() != CodeGenOpt::None)
171     addPass(&IfConverterID);
172 
173   return true;
174 }
175 
176 bool PPCPassConfig::addPreEmitPass() {
177   if (getOptLevel() != CodeGenOpt::None)
178     addPass(createPPCEarlyReturnPass());
179   // Must run branch selection immediately preceding the asm printer.
180   addPass(createPPCBranchSelectionPass());
181   return false;
182 }
183 
184 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
185   // Add first the target-independent BasicTTI pass, then our PPC pass. This
186   // allows the PPC pass to delegate to the target independent layer when
187   // appropriate.
188   PM.add(createBasicTargetTransformInfoPass(this));
189   PM.add(createPPCTargetTransformInfoPass(this));
190 }
191 
192