1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Top-level implementation for the PowerPC target.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "PPCTargetMachine.h"
15 #include "PPC.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/MC/MCStreamer.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/Target/TargetOptions.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/FormattedStream.h"
22 #include "llvm/Support/TargetRegistry.h"
23 using namespace llvm;
24 
25 static cl::
26 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
27                         cl::desc("Disable CTR loops for PPC"));
28 
29 extern "C" void LLVMInitializePowerPCTarget() {
30   // Register the targets
31   RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
32   RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
33 }
34 
35 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT,
36                                    StringRef CPU, StringRef FS,
37                                    const TargetOptions &Options,
38                                    Reloc::Model RM, CodeModel::Model CM,
39                                    CodeGenOpt::Level OL,
40                                    bool is64Bit)
41   : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
42     Subtarget(TT, CPU, FS, is64Bit),
43     DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
44     FrameLowering(Subtarget), JITInfo(*this, is64Bit),
45     TLInfo(*this), TSInfo(*this),
46     InstrItins(Subtarget.getInstrItineraryData()) {
47 
48   // The binutils for the BG/P are too old for CFI.
49   if (Subtarget.isBGP())
50     setMCUseCFI(false);
51 }
52 
53 void PPC32TargetMachine::anchor() { }
54 
55 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
56                                        StringRef CPU, StringRef FS,
57                                        const TargetOptions &Options,
58                                        Reloc::Model RM, CodeModel::Model CM,
59                                        CodeGenOpt::Level OL)
60   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
61 }
62 
63 void PPC64TargetMachine::anchor() { }
64 
65 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
66                                        StringRef CPU,  StringRef FS,
67                                        const TargetOptions &Options,
68                                        Reloc::Model RM, CodeModel::Model CM,
69                                        CodeGenOpt::Level OL)
70   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
71 }
72 
73 
74 //===----------------------------------------------------------------------===//
75 // Pass Pipeline Configuration
76 //===----------------------------------------------------------------------===//
77 
78 namespace {
79 /// PPC Code Generator Pass Configuration Options.
80 class PPCPassConfig : public TargetPassConfig {
81 public:
82   PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
83     : TargetPassConfig(TM, PM) {}
84 
85   PPCTargetMachine &getPPCTargetMachine() const {
86     return getTM<PPCTargetMachine>();
87   }
88 
89   virtual bool addPreRegAlloc();
90   virtual bool addInstSelector();
91   virtual bool addPreEmitPass();
92 };
93 } // namespace
94 
95 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
96   return new PPCPassConfig(this, PM);
97 }
98 
99 bool PPCPassConfig::addPreRegAlloc() {
100   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
101     addPass(createPPCCTRLoops());
102 
103   return false;
104 }
105 
106 bool PPCPassConfig::addInstSelector() {
107   // Install an instruction selector.
108   addPass(createPPCISelDag(getPPCTargetMachine()));
109   return false;
110 }
111 
112 bool PPCPassConfig::addPreEmitPass() {
113   // Must run branch selection immediately preceding the asm printer.
114   addPass(createPPCBranchSelectionPass());
115   return false;
116 }
117 
118 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
119                                       JITCodeEmitter &JCE) {
120   // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
121   // writing?
122   Subtarget.SetJITMode();
123 
124   // Machine code emitter pass for PowerPC.
125   PM.add(createPPCJITCodeEmitterPass(*this, JCE));
126 
127   return false;
128 }
129