1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Top-level implementation for the PowerPC target.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "PPC.h"
15 #include "PPCMCAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Target/TargetOptions.h"
19 #include "llvm/Target/TargetRegistry.h"
20 #include "llvm/Support/FormattedStream.h"
21 using namespace llvm;
22 
23 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
24   Triple TheTriple(TT);
25   bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
26   if (TheTriple.getOS() == Triple::Darwin)
27     return new PPCMCAsmInfoDarwin(isPPC64);
28   return new PPCLinuxMCAsmInfo(isPPC64);
29 
30 }
31 
32 extern "C" void LLVMInitializePowerPCTarget() {
33   // Register the targets
34   RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
35   RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
36 
37   RegisterAsmInfoFn C(ThePPC32Target, createMCAsmInfo);
38   RegisterAsmInfoFn D(ThePPC64Target, createMCAsmInfo);
39 }
40 
41 
42 PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
43                                    const std::string &FS, bool is64Bit)
44   : LLVMTargetMachine(T, TT),
45     Subtarget(TT, FS, is64Bit),
46     DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
47     FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit),
48     TLInfo(*this), TSInfo(*this),
49     InstrItins(Subtarget.getInstrItineraryData()) {
50 
51   if (getRelocationModel() == Reloc::Default) {
52     if (Subtarget.isDarwin())
53       setRelocationModel(Reloc::DynamicNoPIC);
54     else
55       setRelocationModel(Reloc::Static);
56   }
57 }
58 
59 /// Override this for PowerPC.  Tail merging happily breaks up instruction issue
60 /// groups, which typically degrades performance.
61 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
62 
63 PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
64                                        const std::string &FS)
65   : PPCTargetMachine(T, TT, FS, false) {
66 }
67 
68 
69 PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
70                                        const std::string &FS)
71   : PPCTargetMachine(T, TT, FS, true) {
72 }
73 
74 
75 //===----------------------------------------------------------------------===//
76 // Pass Pipeline Configuration
77 //===----------------------------------------------------------------------===//
78 
79 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
80                                        CodeGenOpt::Level OptLevel) {
81   // Install an instruction selector.
82   PM.add(createPPCISelDag(*this));
83   return false;
84 }
85 
86 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
87                                       CodeGenOpt::Level OptLevel) {
88   // Must run branch selection immediately preceding the asm printer.
89   PM.add(createPPCBranchSelectionPass());
90   return false;
91 }
92 
93 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
94                                       CodeGenOpt::Level OptLevel,
95                                       JITCodeEmitter &JCE) {
96   // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
97   // FIXME: This should be moved to TargetJITInfo!!
98   if (Subtarget.isPPC64()) {
99     // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
100     // instructions to materialize arbitrary global variable + function +
101     // constant pool addresses.
102     setRelocationModel(Reloc::PIC_);
103     // Temporary workaround for the inability of PPC64 JIT to handle jump
104     // tables.
105     DisableJumpTables = true;
106   } else {
107     setRelocationModel(Reloc::Static);
108   }
109 
110   // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
111   // writing?
112   Subtarget.SetJITMode();
113 
114   // Machine code emitter pass for PowerPC.
115   PM.add(createPPCJITCodeEmitterPass(*this, JCE));
116 
117   return false;
118 }
119