| /llvm-project-15.0.7/bolt/lib/Rewrite/ |
| H A D | ExecutableFileMemoryManager.cpp | 35 assert(!Section.isAllocatable() && "note sections cannot be allocatable"); in allocateSection()
71 assert(Section.isAllocatable() && in allocateSection()
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| H A D | RewriteInstance.cpp | 838 return Section.isAllocatable(); in discoverFileObjects()
2004 !BinarySection(*BC, Section).isAllocatable()) in processRelocations()
2220 assert(BinarySection(*BC, Section).isAllocatable() && "allocatable expected"); in readDynamicRelocations()
2273 if (BinarySection(*BC, Section).isAllocatable()) { in readRelocations()
2285 if (!BinarySection(*BC, RelocatedSection).isAllocatable()) { in readRelocations()
3790 if (!Section || !Section->isAllocatable() || !Section->isFinalized()) in mapDataSections()
3819 !OrgSection->isAllocatable() || in mapDataSections()
3936 if (EHFrameHdrSec && EHFrameHdrSec->isAllocatable() && in patchELFPHDRTable()
4046 if (BSec && !BSec->isAllocatable()) { in rewriteNoteSections()
5527 return Section && Section->isAllocatable() && Section->isFinalized(); in willOverwriteSection()
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| /llvm-project-15.0.7/bolt/lib/Core/ |
| H A D | BinarySection.cpp | 81 << (isAllocatable() ? "" : "non-") in emitAsData()
128 isAllocatable() ? getInputFileOffset() : getOutputFileOffset(); in flushPendingRelocations()
170 if (!isAllocatable() && in ~BinarySection()
185 if (isAllocatable()) in print()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.td | 331 let isAllocatable = 0;
337 let isAllocatable = 0;
344 let isAllocatable = 0;
360 let isAllocatable = 0;
406 let isAllocatable = 0;
414 let isAllocatable = 0;
583 let isAllocatable = 0;
630 let isAllocatable = 0;
637 let isAllocatable = 0;
644 let isAllocatable = 0;
[all …]
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| H A D | R600RegisterInfo.td | 163 let isAllocatable = 0 in {
209 } // End isAllocatable = 0
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| H A D | GCNNSAReassign.cpp | 130 if (!MRI->isAllocatable(Reg)) in canAssign()
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| H A D | SIFrameLowering.cpp | 227 if (LiveRegs.available(MRI, Reg) && MRI.isAllocatable(Reg) && in emitEntryFunctionFlatScratchInit()
388 if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) && in getEntryFunctionReservedScratchRsrcReg()
483 if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) && in emitEntryFunctionPrologue()
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| /llvm-project-15.0.7/bolt/include/bolt/Core/ |
| H A D | BinaryContext.h | 988 auto isAllocatable = [](const SectionIterator &Itr) { in allocatableSections()
989 return *Itr && Itr->isAllocatable(); in allocatableSections()
992 FilteredSectionIterator(isAllocatable, Sections.begin(), in allocatableSections()
994 FilteredSectionIterator(isAllocatable, Sections.end(), Sections.end())); in allocatableSections()
1000 return *Itr && Itr->isAllocatable() && Itr->isText(); in textSections()
1015 return *Itr && !Itr->isAllocatable(); in nonAllocatableSections()
1030 return *Itr && Itr->isAllocatable() && Itr->isRela(); in allocatableRelaSections()
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| H A D | BinarySection.h | 251 bool isAllocatable() const { in isAllocatable() function
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetRegisterInfo.cpp | 196 if (!RC || RC->isAllocatable()) in getAllocatableClass()
202 if (SubRC->isAllocatable()) in getAllocatableClass()
250 assert(RC->isAllocatable() && "invalid for nonallocatable sets"); in getAllocatableSetForRC()
266 if (C->isAllocatable()) in getAllocatableSet()
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| H A D | MachineRegisterInfo.cpp | 57 assert(RC && RC->isAllocatable() && "Invalid RC for virtual register"); in setRegClass()
159 assert(RegClass->isAllocatable() && in createVirtualRegister()
520 if (!def_empty(*AI) || isAllocatable(*AI)) in isConstantPhysReg()
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| H A D | CalcSpillWeights.cpp | 271 if (HintReg.isVirtual() || MRI.isAllocatable(HintReg)) in weightCalcHelper()
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| H A D | AggressiveAntiDepBreaker.cpp | 636 if (!MRI.isAllocatable(NewSuperReg)) continue; in FindSuitableFreeRegisters()
841 if (!MRI.isAllocatable(AntiDepReg)) { in BreakAntiDependencies()
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| H A D | CriticalAntiDepBreaker.cpp | 568 if (!MRI.isAllocatable(AntiDepReg)) in BreakAntiDependencies()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.td | 558 let Size = 32, isAllocatable = 0 in
569 let isAllocatable = 0 in
572 let Size = 64, isAllocatable = 0 in
577 let Size = 32, isAllocatable = 0 in
587 let Size = 64, isAllocatable = 0 in
596 let Size = 32, isAllocatable = 0 in
615 let Size = 64, isAllocatable = 0 in
632 let isAllocatable = 0 in
638 let Size = 32, isAllocatable = 0 in
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreRegisterInfo.td | 57 let isAllocatable = 0;
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.td | 405 let isAllocatable = 0 in
414 let isAllocatable = 0 in
556 let isAllocatable = 0;
563 let isAllocatable = 0;
580 let isAllocatable = 0;
584 let isAllocatable = 0;
588 let isAllocatable = 0;
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.td | 62 let isAllocatable = 0;
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.td | 43 let isAllocatable = allocatable in
321 let isAllocatable = 0, CopyCost = -1 in
328 let isAllocatable = 0 in
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 118 bool isAllocatable() const { return MC->isAllocatable(); } in isAllocatable() function
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.td | 111 let isAllocatable = 0 in {
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterInfo.td | 294 let isAllocatable = 0;
345 let isAllocatable = 0;
396 let isAllocatable = 0;
462 let isAllocatable = 0;
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchRegisterInfo.td | 160 let isAllocatable = false in
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 413 let isAllocatable = 0;
416 let isAllocatable = 0;
420 let isAllocatable = 0;
423 let isAllocatable = 0;
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| /llvm-project-15.0.7/flang/include/flang/Optimizer/Builder/ |
| H A D | BoxValue.h | 357 bool isAllocatable() const { in isAllocatable() function
|