Searched refs:RISCVAsmBackend (Results 1 – 6 of 6) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 48 RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { in getFixupKindInfo()
116 bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm, in shouldForceRelocation()
168 void RISCVAsmBackend::relaxInstruction(MCInst &Inst, in relaxInstruction()
205 bool RISCVAsmBackend::relaxDwarfLineAddr(MCDwarfLineAddrFragment &DF, in relaxDwarfLineAddr()
275 bool RISCVAsmBackend::relaxDwarfCFA(MCDwarfCallFrameFragment &DF, in relaxDwarfCFA()
336 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const { in getRelaxedOpcode()
350 bool RISCVAsmBackend::mayNeedRelaxation(const MCInst &Inst, in mayNeedRelaxation()
355 bool RISCVAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count, in writeNopData()
488 bool RISCVAsmBackend::evaluateTargetFixup( in evaluateTargetFixup()
583 bool RISCVAsmBackend::shouldInsertExtraNopBytesForCodeAlign( in shouldInsertExtraNopBytesForCodeAlign()
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| H A D | RISCVAsmBackend.h | 24 class RISCVAsmBackend : public MCAsmBackend {
32 RISCVAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit, in RISCVAsmBackend() function
38 ~RISCVAsmBackend() override = default;
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| H A D | CMakeLists.txt | 2 RISCVAsmBackend.cpp
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| H A D | RISCVELFStreamer.cpp | 37 auto &MAB = static_cast<RISCVAsmBackend &>(MCA.getBackend()); in RISCVTargetELFStreamer()
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| /llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | BUILD.gn | 64 "RISCVAsmBackend.cpp",
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 1968 RISCVAsmBackend &MAB = in ParseInstruction()
1969 static_cast<RISCVAsmBackend &>(Assembler->getBackend()); in ParseInstruction()
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