| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.h | 41 MachineRegisterInfo &MRI,
46 bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
66 bool legalizeSinCos(MachineInstr &MI, MachineRegisterInfo &MRI,
77 bool legalizeFMad(MachineInstr &MI, MachineRegisterInfo &MRI,
86 bool legalizeFFloor(MachineInstr &MI, MachineRegisterInfo &MRI,
132 bool legalizeFDIV(MachineInstr &MI, MachineRegisterInfo &MRI,
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| H A D | AMDGPURegisterBankInfo.h | 53 MachineRegisterInfo &MRI,
60 MachineRegisterInfo &MRI) const;
67 MachineRegisterInfo &MRI,
70 MachineRegisterInfo &MRI,
77 MachineRegisterInfo &MRI) const;
80 MachineRegisterInfo &MRI) const;
84 MachineRegisterInfo &MRI, int RSrcIdx) const;
145 const MachineInstr &MI, const MachineRegisterInfo &MRI) const;
151 unsigned getMappingType(const MachineRegisterInfo &MRI,
186 MachineRegisterInfo &MRI,
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| H A D | GCNRegPressure.h | 26 class MachineRegisterInfo; variable
71 const MachineRegisterInfo &MRI);
94 static unsigned getRegKind(Register Reg, const MachineRegisterInfo &MRI);
116 mutable const MachineRegisterInfo *MRI = nullptr;
142 const MachineRegisterInfo &MRI);
199 const MachineRegisterInfo &MRI);
203 const MachineRegisterInfo &MRI);
262 GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI, in getRegPressure()
275 const MachineRegisterInfo &MRI);
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| H A D | SIRegisterInfo.h | 196 bool isSGPRReg(const MachineRegisterInfo &MRI, Register Reg) const;
279 MCRegister findUnusedRegister(const MachineRegisterInfo &MRI,
284 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
286 bool isVGPR(const MachineRegisterInfo &MRI, Register Reg) const;
287 bool isAGPR(const MachineRegisterInfo &MRI, Register Reg) const;
288 bool isVectorRegister(const MachineRegisterInfo &MRI, Register Reg) const { in isVectorRegister()
329 const MachineRegisterInfo &MRI) const override;
354 MachineRegisterInfo &MRI,
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| H A D | SIInstrInfo.h | 34 class MachineRegisterInfo; variable
69 MachineRegisterInfo &MRI,
123 MachineRegisterInfo &MRI,
781 const MachineRegisterInfo &MRI = MF.getRegInfo(); in isVGPRCopy()
787 const MachineRegisterInfo &MRI = MF.getRegInfo(); in hasVGPRUses()
884 bool usesConstantBus(const MachineRegisterInfo &MRI,
897 const MachineRegisterInfo &MRI) const;
960 bool isLegalVSrcOperand(const MachineRegisterInfo &MRI,
966 bool isLegalRegOperand(const MachineRegisterInfo &MRI,
1189 MachineRegisterInfo &MRI) { in isOfRegClass()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 40 class MachineRegisterInfo; variable
89 Register constrainRegToClass(MachineRegisterInfo &MRI,
104 MachineRegisterInfo &MRI,
123 MachineRegisterInfo &MRI,
193 Register VReg, const MachineRegisterInfo &MRI,
215 const MachineRegisterInfo &MRI);
251 T *getOpcodeDef(Register Reg, const MachineRegisterInfo &MRI) { in getOpcodeDef()
414 const MachineRegisterInfo &MRI,
420 const MachineRegisterInfo &MRI,
444 const MachineRegisterInfo &MRI,
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| H A D | MIPatternMatch.h | 39 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
53 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
81 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
116 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
142 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
155 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
369 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
393 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
516 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
609 bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
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| H A D | LoadStoreOpt.h | 33 class MachineRegisterInfo; variable
44 BaseIndexOffset getPointerInfo(Register Ptr, MachineRegisterInfo &MRI);
50 bool &IsAlias, MachineRegisterInfo &MRI);
57 MachineRegisterInfo &MRI, AliasAnalysis *AA);
71 MachineRegisterInfo *MRI;
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 41 void MachineRegisterInfo::Delegate::anchor() {} in anchor()
43 MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) in MachineRegisterInfo() function in MachineRegisterInfo
61 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank()
67 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass()
83 MachineRegisterInfo::constrainRegClass(Register Reg, in constrainRegClass()
90 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs()
120 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass()
180 void MachineRegisterInfo::setType(Register VReg, LLT Ty) { in setType()
200 void MachineRegisterInfo::clearVirtRegs() { in clearVirtRegs()
253 void MachineRegisterInfo::verifyUseLists() const { in verifyUseLists()
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| H A D | MIRVRegNamerUtils.h | 29 class MachineRegisterInfo; variable
48 MachineRegisterInfo &MRI;
85 VRegRenamer(MachineRegisterInfo &MRI) : MRI(MRI) {} in VRegRenamer()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.h | 37 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
39 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
42 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
46 bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
50 bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
52 bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
54 bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
56 bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,
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| H A D | AArch64PostLegalizerLowering.cpp | 218 static bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
247 static bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
268 static bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
284 static bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
341 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
521 const MachineRegisterInfo &MRI) { in tryAdjustICmpImmAndPred()
617 MachineInstr &MI, const MachineRegisterInfo &MRI, in matchAdjustICmpImmAndPred()
634 MachineRegisterInfo &MRI = *MIB.getMRI(); in applyAdjustICmpImmAndPred()
644 bool matchDupLane(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDupLane()
696 bool applyDupLane(MachineInstr &MI, MachineRegisterInfo &MRI, in applyDupLane()
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| H A D | AArch64PostLegalizerCombiner.cpp | 54 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd()
97 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
113 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended()
119 static bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended()
125 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine()
238 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
248 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFoldMergeToZext()
256 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldMergeToZext()
286 static void applyMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI, in applyMutateAnyExtToZExt()
296 static bool matchSplitStoreZero128(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchSplitStoreZero128()
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| H A D | AArch64GlobalISelUtils.h | 36 const MachineRegisterInfo &MRI);
41 const MachineRegisterInfo &MRI);
46 const MachineRegisterInfo &MRI);
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| H A D | AArch64InstructionSelector.cpp | 1081 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitSelect()
1497 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitTestBit()
1570 MachineRegisterInfo &MRI = *MIB.getMRI(); in emitCBZ()
1617 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptCompareBranchFedByICmp()
1925 MachineRegisterInfo &MRI = MF.getRegInfo(); in materializeLargeCMVal()
1961 MachineRegisterInfo &MRI = MF.getRegInfo(); in preISelLower()
4986 MachineRegisterInfo &MRI = *MIB.getMRI(); in tryOptSelect()
6369 MachineRegisterInfo &MRI = in selectAddrModeUnscaled()
6524 MachineRegisterInfo &MRI = in selectShiftedRegister()
6619 MachineRegisterInfo &MRI = *MIB.getMRI(); in moveScalarRegClass()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 41 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
53 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
105 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
158 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands()
197 MachineRegisterInfo &MRI) { in canReplaceReg()
211 const MachineRegisterInfo &MRI) { in isTriviallyDead()
613 const MachineRegisterInfo &MRI) { in ConstantFoldVectorBinop()
718 MachineRegisterInfo &MRI = MF.getRegInfo(); in getFunctionLiveInPhysReg()
1140 const MachineRegisterInfo &MRI, in isConstantScalar()
1242 const MachineRegisterInfo &MRI, Register Reg, in matchUnaryPredicate()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.h | 28 class MachineRegisterInfo; variable
135 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
138 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
141 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
144 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
147 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
150 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
153 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
156 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
159 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
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| H A D | RDFDeadCode.h | 31 class MachineRegisterInfo; variable
35 DeadCodeElimination(DataFlowGraph &dfg, MachineRegisterInfo &mri) in DeadCodeElimination()
53 MachineRegisterInfo &MRI;
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXCopy.cpp | 52 MachineRegisterInfo &MRI) { in IsRegInClass()
62 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSReg()
66 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVRReg()
70 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) { in IsF8Reg()
74 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSFReg()
78 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSSReg()
86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in processBlock()
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 64 void processCandidate(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
67 void processDstReg(MachineRegisterInfo *MRI, Register &DstReg,
70 void processInst(MachineRegisterInfo *MRI, MachineInstr *Inst,
72 void checkADDrr(MachineRegisterInfo *MRI, MachineOperand *RelocOp,
74 void checkShift(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
102 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
154 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
168 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
203 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
240 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 87 bool selectZext(MachineInstr &I, MachineRegisterInfo &MRI,
89 bool selectAnyext(MachineInstr &I, MachineRegisterInfo &MRI,
91 bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
93 bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
95 bool selectUadde(MachineInstr &I, MachineRegisterInfo &MRI,
102 bool selectInsert(MachineInstr &I, MachineRegisterInfo &MRI,
104 bool selectExtract(MachineInstr &I, MachineRegisterInfo &MRI,
116 bool selectDivRem(MachineInstr &I, MachineRegisterInfo &MRI,
317 MachineRegisterInfo &MRI = MF.getRegInfo(); in select()
477 const MachineRegisterInfo &MRI, in X86SelectAddress()
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| H A D | X86DomainReassignment.cpp | 104 MachineRegisterInfo *MRI) const = 0;
108 MachineRegisterInfo *MRI) const = 0;
119 MachineRegisterInfo *MRI) const override { in convertInstr()
125 MachineRegisterInfo *MRI) const override { in getExtraCost()
153 MachineRegisterInfo *MRI) const override { in convertInstr()
165 MachineRegisterInfo *MRI) const override { in getExtraCost()
181 MachineRegisterInfo *MRI) const override { in convertInstr()
201 MachineRegisterInfo *MRI) const override { in getExtraCost()
236 MachineRegisterInfo *MRI) const override { in getExtraCost()
267 MachineRegisterInfo *MRI) const override { in convertInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64AdvSIMDScalarPass.cpp | 66 MachineRegisterInfo *MRI;
105 const MachineRegisterInfo *MRI) { in isGPR64()
114 const MachineRegisterInfo *MRI) { in isFPR64()
128 const MachineRegisterInfo *MRI, in getSrcFromCopy()
209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
241 for (MachineRegisterInfo::use_instr_nodbg_iterator in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 31 class MachineRegisterInfo; variable
289 MachineRegisterInfo &MRI;
323 MachineRegisterInfo &MRI);
334 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI()
547 const MachineRegisterInfo &MRI) const;
584 const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
647 MachineRegisterInfo &MRI);
731 unsigned getSizeInBits(Register Reg, const MachineRegisterInfo &MRI,
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.h | 49 MachineRegisterInfo &MRI) in M68kIncomingValueHandler()
67 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
72 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler()
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