| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1095 setTruncStoreAction(VT, InnerVT, Expand); in AArch64TargetLowering()
1256 setTruncStoreAction(VT, InnerVT, Expand); in AArch64TargetLowering()
1494 for (MVT InnerVT : MVT::all_valuetypes()) in addTypeForNEON() local
1608 MVT InnerVT = VT.changeVectorElementType(MVT::i8); in addTypeForFixedLengthSVE() local
1609 while (InnerVT != VT) { in addTypeForFixedLengthSVE()
1610 setTruncStoreAction(VT, InnerVT, Custom); in addTypeForFixedLengthSVE()
1613 InnerVT = InnerVT.changeVectorElementType( in addTypeForFixedLengthSVE()
1621 MVT InnerVT = VT.changeVectorElementType(MVT::f16); in addTypeForFixedLengthSVE() local
1622 while (InnerVT != VT) { in addTypeForFixedLengthSVE()
1623 setTruncStoreAction(VT, InnerVT, Custom); in addTypeForFixedLengthSVE()
[all …]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1728 EVT InnerVT = InnerOp.getValueType(); in SimplifyDemandedBits() local
1729 unsigned InnerBits = InnerVT.getScalarSizeInBits(); in SimplifyDemandedBits()
1731 isTypeDesirableForOp(ISD::SHL, InnerVT)) { in SimplifyDemandedBits()
1732 EVT ShTy = getShiftAmountTy(InnerVT, DL); in SimplifyDemandedBits()
1734 ShTy = InnerVT; in SimplifyDemandedBits()
1736 TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp, in SimplifyDemandedBits()
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| H A D | DAGCombiner.cpp | 8954 EVT InnerVT = N0Op0.getValueType(); in visitSHL() local
8955 uint64_t InnerBitwidth = InnerVT.getScalarSizeInBits(); in visitSHL()
22780 EVT InnerVT = BC0->getValueType(0); in visitVECTOR_SHUFFLE() local
22781 EVT InnerSVT = InnerVT.getScalarType(); in visitVECTOR_SHUFFLE()
22784 EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT; in visitVECTOR_SHUFFLE()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 334 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in SystemZTargetLowering() local
335 setTruncStoreAction(VT, InnerVT, Expand); in SystemZTargetLowering()
336 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
337 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
338 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 863 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in PPCTargetLowering() local
864 setTruncStoreAction(VT, InnerVT, Expand); in PPCTargetLowering()
865 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
866 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
867 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand); in PPCTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 803 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in ARMTargetLowering() local
804 setTruncStoreAction(VT, InnerVT, Expand); in ARMTargetLowering()
805 addAllExtLoads(VT, InnerVT, Expand); in ARMTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 949 for (MVT InnerVT : MVT::fixedlen_vector_valuetypes()) { in X86TargetLowering() local
950 setTruncStoreAction(InnerVT, VT, Expand); in X86TargetLowering()
952 setLoadExtAction(ISD::SEXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
953 setLoadExtAction(ISD::ZEXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
960 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
966 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT, Expand); in X86TargetLowering()
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