| /llvm-project-15.0.7/clang-tools-extra/clang-tidy/bugprone/ |
| H A D | ReservedIdentifierCheck.h | 34 const bool Invert; variable
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| H A D | ReservedIdentifierCheck.cpp | 111 const LangOptions &LangOpts, bool Invert, in getFailureInfoImpl()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 155 AArch64CC::CondCode &CondCode2, bool &Invert) { in changeVectorFCMPPredToAArch64CC()
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| H A D | AArch64PostLegalizerLowering.cpp | 931 bool Invert; in lowerVectorFCMP() local
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| H A D | AArch64InstructionSelector.cpp | 1104 bool Invert) { in emitSelect()
1360 static Register getTestBitReg(Register Reg, uint64_t &Bit, bool &Invert, in getTestBitReg()
1525 MachineInstr &AndInst, bool Invert, MachineBasicBlock *DstMBB, in tryOptAndIntoCompareBranch()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 497 bool Invert = !DefMI; in optimizeSelect() local
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| H A D | LanaiISelLowering.cpp | 1353 bool &Invert, SDValue &OtherOp, in isConditionalZeroOrAllOnes()
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| /llvm-project-15.0.7/flang/lib/Parser/ |
| H A D | provenance.cpp | 125 ProvenanceRangeToOffsetMappings OffsetToProvenanceMappings::Invert( in Invert() function in Fortran::parser::OffsetToProvenanceMappings
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | StructurizeCFG.cpp | 444 bool Invert) { in buildCondition()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombinePHI.cpp | 1325 Optional<bool> Invert; in simplifyUsingControlFlow() local
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 1170 bool Invert = false; in LowerSETCC() local
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2951 bool &Invert) { in getVectorComparisonOrInvert()
3034 bool Invert = false; in lowerVectorSETCC() local
6918 bool Invert = false; in combineCCMask() local
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1944 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1); in LowerSETCC() local
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2813 bool &Invert) { in changeVectorFPCCToAArch64CC()
3566 static SDValue valueToCarryFlag(SDValue Value, SelectionDAG &DAG, bool Invert) { in valueToCarryFlag()
3579 bool Invert) { in carryFlagToValue()
18526 static SDValue getTestBitOperand(SDValue Op, unsigned &Bit, bool &Invert, in getTestBitOperand()
18603 bool Invert = false; in performTBZCombine() local
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| H A D | AArch64ISelDAGToDAG.cpp | 3339 bool Invert) { in SelectSVELogicalImm()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 2357 bool Invert = !DefMI; in optimizeSelect() local
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| H A D | ARMISelLowering.cpp | 6682 bool Invert = false; in LowerVSETCC() local
12279 SDValue &CC, bool &Invert, in isConditionalZeroOrAllOnes()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 4153 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) { in getCRIdxForSetCC()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 2744 bool Invert = false; in SpeculativelyExecuteBB() local
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24556 bool Invert = false; in LowerVSETCC() local
24589 bool Invert = Cond == ISD::SETNE || in LowerVSETCC() local
24795 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1); in emitFlagsForSetcc() local
41134 auto GetDemandedMasks = [&](SDValue Op, bool Invert = false) { in SimplifyDemandedVectorEltsForTargetNode()
51298 auto GetDemandedMasks = [&](SDValue Op, bool Invert = false) { in combineAndnp()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8763 bool Invert = CCVal == ISD::SETEQ; in combine_CC() local
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 226 bool Invert = false) { in EmitBinaryAtomicPost()
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