| /wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/inst/ |
| H A D | encode.rs | 32 bits in encode_r_type_bits() 64 bits in encode_i_type_bits() 86 bits |= (offset.bits() & 0b11111) << 7; in encode_s_type() 91 bits in encode_s_type() 247 bits in encode_vcfg_imm() 286 bits in encode_vmem_load() 322 csr.bits().bits(), in encode_csr_imm() 332 bits |= unsigned_field_width(op.op().bits(), 2); in encode_cr_type() 353 bits |= unsigned_field_width(op.op().bits(), 2); in encode_ca_type() 596 bits |= unsigned_field_width(op.bits(), 2); in encode_cs_cl_type_bits() [all …]
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| H A D | imms.rs | 12 bits: u16, field 35 assert!(bits >= -2048 && bits <= 2047); in from_i16() 37 bits: (bits & 0xfff) as u16, in from_i16() 47 pub fn bits(&self) -> u32 { in bits() method 48 self.bits.into() in bits() 70 bits: u32, field 90 assert!(bits >= -(0x7_ffff + 1) && bits <= 0x7_ffff); in from_i32() 92 bits: (bits as u32) & 0xf_ffff, in from_i32() 102 pub fn bits(&self) -> u32 { in bits() method 103 self.bits in bits() [all …]
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/s390x/inst/ |
| H A D | imms.rs | 39 pub fn bits(&self) -> u32 { in bits() method 64 value: value.bits() as i32, in from_uimm12() 69 pub fn bits(&self) -> u32 { in bits() method 79 pub bits: u16, field 125 bits: imm, in maybe_with_shift() 133 bits: !self.bits, in negate_bits() 143 pub bits: u32, field 175 bits: imm, in maybe_with_shift() 183 bits: !self.bits, in negate_bits() 203 format!("{}", self.bits) in pretty_print() [all …]
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| /wasmtime-44.0.1/cranelift/codegen/src/ |
| H A D | isle_prelude.rs | 32 let bits = ty.bits(); localVariable 42 let bits = ty.bits(); localVariable 133 let bits = ty.bits(); localVariable 157 let bits = ty.bits(); localVariable 185 x.sign_extend_from_width(ty.bits()).bits() 363 if ty.bits() == 32 || ty.bits() == 64 { 372 if ty.bits() == 8 || ty.bits() == 16 { 381 if ty.bits() == 16 || ty.bits() == 32 { 582 val.bits() 586 val.bits() [all …]
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| H A D | data_value.rs | 112 DataValue::F16(f) => DataValue::F16(Ieee16::with_bits(f.bits().swap_bytes())), in swap_bytes() 113 DataValue::F32(f) => DataValue::F32(Ieee32::with_bits(f.bits().swap_bytes())), in swap_bytes() 114 DataValue::F64(f) => DataValue::F64(Ieee64::with_bits(f.bits().swap_bytes())), in swap_bytes() 165 DataValue::F16(f) => dst[..2].copy_from_slice(&f.bits().to_ne_bytes()[..]), in write_to_slice_ne() 166 DataValue::F32(f) => dst[..4].copy_from_slice(&f.bits().to_ne_bytes()[..]), in write_to_slice_ne() 167 DataValue::F64(f) => dst[..8].copy_from_slice(&f.bits().to_ne_bytes()[..]), in write_to_slice_ne() 168 DataValue::F128(f) => dst[..16].copy_from_slice(&f.bits().to_ne_bytes()[..]), in write_to_slice_ne() 271 (DataValue::F16(a), DataValue::F16(b)) => a.bits() == b.bits(), in bitwise_eq() 272 (DataValue::F32(a), DataValue::F32(b)) => a.bits() == b.bits(), in bitwise_eq() 273 (DataValue::F64(a), DataValue::F64(b)) => a.bits() == b.bits(), in bitwise_eq() [all …]
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| /wasmtime-44.0.1/cranelift/codegen/src/ir/ |
| H A D | memflags.rs | 34 const fn from_bits(bits: u8) -> Option<Self> { in from_bits() 35 match bits { in from_bits() 82 bits: u16, field 130 self.bits & bit != 0 in read_bit() 135 self.bits |= bit; in with_bit() 146 let bits = AliasRegion::to_bits(region); in with_alias_region() localVariable 147 self.bits &= !MASK_ALIAS_REGION; in with_alias_region() 148 self.bits |= (bits as u16) << ALIAS_REGION_OFFSET; in with_alias_region() 370 let bits = match code { in with_trap_code() localVariable 374 self.bits &= !MASK_TRAP_CODE; in with_trap_code() [all …]
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| H A D | sourceloc.rs | 23 pub fn new(bits: u32) -> Self { in new() 24 Self(bits) in new() 33 pub fn bits(self) -> u32 { in bits() method 61 pub fn new(bits: u32) -> Self { in new() 62 Self(bits) in new() 70 Self(offset.bits().wrapping_sub(base.bits())) in from_base_offset() 79 SourceLoc::new(self.0.wrapping_add(base.bits())) in expand()
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| H A D | immediates.rs | 518 bits = $bits:literal, 566 self.bits 734 self.bits().partial_cmp(&rhs.bits()) 737 rhs.bits().partial_cmp(&self.bits()) 820 Self::with_bits(self.bits() & rhs.bits()) 828 Self::with_bits(self.bits() | rhs.bits()) 836 Self::with_bits(self.bits() ^ rhs.bits()) 852 bits = 16, 861 bits = 32, 870 bits = 64, [all …]
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| H A D | types.rs | 106 pub fn int(bits: u16) -> Option<Self> { in int() 107 match bits { in int() 284 pub fn bits(self) -> u32 { in bits() method 307 self.bits() in min_bits() 313 (self.bits() + 7) / 8 in bytes() 343 if self.bits() > 256 { in vector_to_dynamic() 416 pub(crate) fn from_repr(bits: u16) -> Type { in from_repr() 417 Type(bits) in from_repr() 473 assert_eq!(0, INVALID.bits()); in basic_scalars() 531 assert_eq!(big.bits(), 64 * 256); in vectors()
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/lower/ |
| H A D | isle.rs | 189 let bits = ty.bits(); in move_wide_const_from_u64() localVariable 190 let n = if bits < 64 { in move_wide_const_from_u64() 191 n & !(u64::MAX << bits) in move_wide_const_from_u64() 298 let bits = ty.bits(); in load_constant_full() localVariable 302 let shift = 32 - bits; in load_constant_full() 314 let shift = 64 - bits; in load_constant_full() 319 (OperandSize::Size64, ImmExtend::Zero) if bits < 64 => value & !(u64::MAX << bits), in load_constant_full() 380 bits: match op { in load_constant_full() 392 let bits = get(value, shift); in load_constant_full() localVariable 479 let imm_value = (val.bits() as u64) & ((ty.bits() - 1) as u64); in imm_shift_from_imm64() [all …]
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| /wasmtime-44.0.1/pulley/src/ |
| H A D | regs.rs | 201 pub fn from_bits(bits: u16) -> Self { in from_bits() 203 dst: D::new((bits & 0b11111) as u8).unwrap(), in from_bits() 204 src1: S1::new(((bits >> 5) & 0b11111) as u8).unwrap(), in from_bits() 220 pub fn from_bits(bits: u16) -> Self { in from_bits() 222 dst: D::new((bits & 0b11111) as u8).unwrap(), in from_bits() 223 src1: S1::new(((bits >> 5) & 0b11111) as u8).unwrap(), in from_bits() 394 pub fn from_bits(bits: u32) -> AddrG32 { in from_bits() 402 offset: bits as u16, in from_bits() 453 pub fn from_bits(bits: u32) -> AddrG32Bne { in from_bits() 460 host_heap_bound_offset: (bits >> 8) as u8, in from_bits() [all …]
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/inst/ |
| H A D | imms.rs | 29 pub fn bits(&self) -> u32 { in bits() method 55 pub fn bits(&self) -> u32 { in bits() method 90 pub fn bits(&self) -> u32 { in bits() method 209 pub fn bits(&self) -> u32 { in bits() method 252 pub fn bits(&self) -> u32 { in bits() method 267 pub bits: u16, field 275 bits: 0, 283 bits: val as u16, in maybe_from_u64() 303 self.bits as u32 in imm_bits() 565 pub bits: u16, field [all …]
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| H A D | args.rs | 25 pub fn bits(self) -> u8 { in bits() method 54 ShiftOpShiftImm(self.0 & (bits - 1)) in mask() 108 pub fn bits(self) -> u8 { in bits() method 225 pub fn bits(self) -> u32 { in bits() method 294 let hi = (1 << (bits - 1)) - 1; in as_offset_bounded() 295 let lo = -(1 << bits - 1); in as_offset_bounded() 298 (off as u32) & ((1 << bits) - 1) in as_offset_bounded() 475 let bits: usize = bits.into(); in from_bits() localVariable 476 assert!(bits <= 64); in from_bits() 477 if bits <= 32 { in from_bits() [all …]
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| /wasmtime-44.0.1/cranelift/codegen/src/machinst/ |
| H A D | reg.rs | 57 let bits = vreg.bits() as u32; in from_virtual_reg() localVariable 58 debug_assert!(bits <= REG_SPILLSLOT_MASK); in from_virtual_reg() 59 Reg(bits) in from_virtual_reg() 65 let bits = vreg.bits() as u32; in from_real_reg() localVariable 67 Reg(bits) in from_real_reg() 73 let bits = vreg.bits() as u32; in from_virtual_reg_checked() localVariable 74 if bits <= REG_SPILLSLOT_MASK { in from_virtual_reg_checked() 75 Some(Reg(bits)) in from_virtual_reg_checked() 273 Reg(vreg.bits() as u32) in from() 332 Reg(VReg::from(reg).bits() as u32) in from() [all …]
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| /wasmtime-44.0.1/cranelift/filetests/filetests/isa/pulley64/ |
| H A D | extend.clif | 15 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 37 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 59 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 80 …estCase(%g), args: [XReg(p0i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 101 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 123 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 145 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 166 …estCase(%g), args: [XReg(p0i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295…
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| /wasmtime-44.0.1/cranelift/filetests/filetests/isa/pulley32/ |
| H A D | extend.clif | 15 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 37 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 58 …estCase(%g), args: [XReg(p0i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 78 …estCase(%g), args: [XReg(p0i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 99 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 121 …estCase(%g), args: [XReg(p2i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 142 …estCase(%g), args: [XReg(p0i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295… 162 …estCase(%g), args: [XReg(p0i)] }, uses: [], defs: [], clobbers: PRegSet { bits: [65535, 4294967295…
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| /wasmtime-44.0.1/cranelift/codegen/meta/src/ |
| H A D | gen_types.rs | 23 fn emit_vectors(bits: u64, fmt: &mut Formatter) { in emit_vectors() 24 let vec_size: u64 = bits / 8; in emit_vectors() 36 fn emit_dynamic_vectors(bits: u64, fmt: &mut Formatter) { in emit_dynamic_vectors() 37 let vec_size: u64 = bits / 8; in emit_dynamic_vectors()
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| /wasmtime-44.0.1/cranelift/interpreter/src/ |
| H A D | address.rs | 46 pub fn bits(&self) -> u64 { in bits() method 76 pub fn decode(bits: u64) -> Self { in decode() 77 assert!(bits < 4); in decode() 78 match bits { in decode() 160 size.bits() - entry_bits - region_bits in offset_bits() 200 let region = AddressRegion::decode(addr >> (size.bits() - 2)); in try_from() 233 fn from(bits: u64) -> Self { in from() 234 match bits { in from()
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| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/src/solver/encoded_ops/ |
| H A D | popcnt.rs | 9 let mut bits: Vec<_> = (0..ty) in popcnt() localVariable 12 let initial = bits.pop().unwrap(); in popcnt() 13 let r = bits.iter().fold(initial, |a, b| s.smt.bvadd(a, *b)); in popcnt()
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| /wasmtime-44.0.1/crates/fuzzing/src/generators/ |
| H A D | value.rs | 65 let bits = biased_arbitrary_value(u, known_f32_values)?; in arbitrary_of_type() localVariable 71 let bits = if f32::from_bits(bits).is_nan() { in arbitrary_of_type() localVariable 74 bits in arbitrary_of_type() 76 DiffValue::F32(bits) in arbitrary_of_type() 91 let bits = biased_arbitrary_value(u, known_f64_values)?; in arbitrary_of_type() localVariable 94 let bits = if f64::from_bits(bits).is_nan() { in arbitrary_of_type() localVariable 97 bits in arbitrary_of_type() 99 DiffValue::F64(bits) in arbitrary_of_type()
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/riscv64/lower/ |
| H A D | isle.rs | 205 if ty.is_vector() && (ty.bits() as u64) <= self.min_vec_reg_size() { in ty_vec_fits_in_register() 230 && lane_type.bits() <= 64 => in ty_supported() 245 …&& (lane_type.bits() == 32 || lane_type.bits() == 64 || (lane_type.bits() == 16 && self.backend.is… in ty_supported() 392 Imm5::from_bits(arg0.bits() as u8) in uimm5_bitcast_to_imm5() 434 UImm5::maybe_from_u8(frm.bits()).unwrap() in frm_bits() 453 let ty_bits = if ty.bits() > 64 { 64 } else { ty.bits() }; in gen_shamt() 552 if ty.is_int() && ty.bits() <= 64 { in valid_atomic_transaction() 649 let neg = !i & (u64::MAX >> (64 - ty.bits())); in bclr_imm() 681 (_, F64) if !saturating => f64_cvt_to_int_bounds(true, int.bits()).0.to_bits(), in fcvt_smin_bound() 695 (_, F64) if !saturating => f64_cvt_to_int_bounds(true, int.bits()).1.to_bits(), in fcvt_smax_bound() [all …]
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| /wasmtime-44.0.1/cranelift/filetests/filetests/verifier/ |
| H A D | bitcast.clif | 13 …; error: The bitcast argument v0 has a type of 32 bits, which doesn't match an expected type of 64… 20 …; error: The bitcast argument v0 has a type of 64 bits, which doesn't match an expected type of 32…
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| /wasmtime-44.0.1/crates/cranelift/src/func_environ/stack_switching/ |
| H A D | fatpointer.rs | 11 let ptr_bits = env.pointer_type().bits(); in fatpointer_type() 25 let ptr_bits = ptr_ty.bits(); in deconstruct() 43 let ptr_bits = ptr_ty.bits(); in construct()
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| /wasmtime-44.0.1/cranelift/assembler-x64/meta/src/generate/ |
| H A D | format.rs | 139 |l: &dsl::Location| l.bits() == 8 && matches!(l.kind(), Reg(_) | RegMem(_)); in generate_rex_prefix() 143 let bits = "w_bit, uses_8bit"; in generate_rex_prefix() localVariable 227 fmtln!(f, "let pp = {:#04b};", vex.pp.map_or(0b00, |pp| pp.bits())); in generate_vex_prefix() 228 fmtln!(f, "let mmmmm = {:#07b};", vex.mmmmm.unwrap().bits()); in generate_vex_prefix() 230 let bits = "len, pp, mmmmm, w"; in generate_vex_prefix() localVariable 232 self.generate_vex_or_evex_prefix(f, "VexPrefix", &bits, vex.is4, None, || { in generate_vex_prefix() 242 fmtln!(f, "let pp = {:#04b};", evex.pp.map_or(0b00, |pp| pp.bits())); in generate_evex_prefix() 243 fmtln!(f, "let mmm = {:#07b};", evex.mmm.unwrap().bits()); in generate_evex_prefix() 249 let bits = format!("ll, pp, mmm, w, bcast"); in generate_evex_prefix() localVariable 292 self.generate_vex_or_evex_prefix(f, "EvexPrefix", &bits, is4, evex_scaling, || { in generate_evex_prefix() [all …]
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| /wasmtime-44.0.1/crates/environ/src/compile/ |
| H A D | stack_maps.rs | 116 let mut bits = CompoundBitSet::<u32>::default(); in push() localVariable 119 bits.insert((offset / 4) as usize); in push() 121 let count = bits.iter_scalars().count(); in push() 124 for scalar in bits.iter_scalars() { in push()
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