| /wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/inst/ |
| H A D | args.rs | 598 pub enum VectorSize { enum
615 impl VectorSize { impl
620 VectorSize::Size8x8 | VectorSize::Size16x4 | VectorSize::Size32x2 => { in as_scalar8_vector()
621 VectorSize::Size8x8 in as_scalar8_vector()
624 VectorSize::Size8x16 in as_scalar8_vector()
625 | VectorSize::Size16x8 in as_scalar8_vector()
626 | VectorSize::Size32x4 in as_scalar8_vector()
627 | VectorSize::Size64x2 => VectorSize::Size8x16, in as_scalar8_vector()
656 VectorSize::Size8x8 | VectorSize::Size8x16 => ScalarSize::Size8, in lane_size()
657 VectorSize::Size16x4 | VectorSize::Size16x8 => ScalarSize::Size16, in lane_size()
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| H A D | emit_tests.rs | 2512 size: VectorSize::Size8x8, in test_aarch64_binemit()
2584 size: VectorSize::Size8x8, in test_aarch64_binemit()
2628 size: VectorSize::Size8x8, in test_aarch64_binemit()
2637 size: VectorSize::Size8x8, in test_aarch64_binemit()
3934 size: VectorSize::Size8x8, in test_aarch64_binemit()
4006 size: VectorSize::Size8x8, in test_aarch64_binemit()
4078 size: VectorSize::Size8x8, in test_aarch64_binemit()
4150 size: VectorSize::Size8x8, in test_aarch64_binemit()
4222 size: VectorSize::Size8x8, in test_aarch64_binemit()
4405 size: VectorSize::Size8x8, in test_aarch64_binemit()
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| H A D | regs.rs | 5 use crate::isa::aarch64::inst::VectorSize;
235 pub fn show_vreg_vector(reg: Reg, size: VectorSize) -> String { in show_vreg_vector()
240 VectorSize::Size8x8 => ".8b", in show_vreg_vector()
241 VectorSize::Size8x16 => ".16b", in show_vreg_vector()
242 VectorSize::Size16x4 => ".4h", in show_vreg_vector()
243 VectorSize::Size16x8 => ".8h", in show_vreg_vector()
244 VectorSize::Size32x2 => ".2s", in show_vreg_vector()
245 VectorSize::Size32x4 => ".4s", in show_vreg_vector()
246 VectorSize::Size64x2 => ".2d", in show_vreg_vector()
275 pub fn pretty_print_vreg_vector(reg: Reg, size: VectorSize) -> String { in pretty_print_vreg_vector()
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| H A D | mod.rs | 2187 ("saddlp", VectorSize::Size16x8, VectorSize::Size8x16) in print_with_state()
2190 ("saddlp", VectorSize::Size32x4, VectorSize::Size16x8) in print_with_state()
2311 ("smull", VectorSize::Size16x8, VectorSize::Size8x8) in print_with_state()
2317 ("smull", VectorSize::Size32x4, VectorSize::Size16x4) in print_with_state()
2323 ("smull", VectorSize::Size64x2, VectorSize::Size32x2) in print_with_state()
2329 ("umull", VectorSize::Size16x8, VectorSize::Size8x8) in print_with_state()
2335 ("umull", VectorSize::Size32x4, VectorSize::Size16x4) in print_with_state()
2341 ("umull", VectorSize::Size64x2, VectorSize::Size32x2) in print_with_state()
2362 ("umlal", VectorSize::Size16x8, VectorSize::Size8x8) in print_with_state()
2368 ("umlal", VectorSize::Size32x4, VectorSize::Size16x4) in print_with_state()
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| H A D | emit.rs | 1905 size == VectorSize::Size32x2 in emit()
1913 size == VectorSize::Size32x2 in emit()
1932 debug_assert!(size == VectorSize::Size8x16 || size == VectorSize::Size16x8); in emit()
1960 debug_assert!(size == VectorSize::Size32x4 || size == VectorSize::Size64x2); in emit()
1964 debug_assert!(size == VectorSize::Size32x4 || size == VectorSize::Size64x2); in emit()
2000 debug_assert!(size == VectorSize::Size8x8 || size == VectorSize::Size8x16); in emit()
2053 VectorSize::Size8x8 => (0b0, 0b00), in emit()
2325 VectorSize::Size32x2 => { in emit()
2329 VectorSize::Size32x4 => { in emit()
2790 VectorSize::Size32x4 => { in emit()
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/ |
| H A D | inst.isle | 355 (size VectorSize))
546 (size VectorSize))
560 (size VectorSize)
573 (size VectorSize)
686 (size VectorSize)
712 (size VectorSize)
721 (size VectorSize)
786 (size VectorSize)
1378 (model VectorSize
1388 (type VectorSize extern
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| H A D | lower.isle | 173 (vec_uzp1 a b (VectorSize.Size8x16)))
175 (vec_uzp2 a b (VectorSize.Size8x16)))
177 (vec_uzp1 a b (VectorSize.Size16x8)))
179 (vec_uzp2 a b (VectorSize.Size16x8)))
181 (vec_uzp1 a b (VectorSize.Size32x4)))
230 (rev16 a (VectorSize.Size8x16)))
232 (rev32 a (VectorSize.Size8x16)))
234 (rev32 a (VectorSize.Size16x8)))
236 (rev64 a (VectorSize.Size8x16)))
238 (rev64 a (VectorSize.Size16x8)))
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| H A D | lower_dynamic_neon.isle | 44 (let ((dst Reg (mov_vec_elem x y 1 0 (VectorSize.Size64x2))))
58 (let ((dst Reg (mov_vec_elem x y 1 0 (VectorSize.Size64x2))))
72 (let ((dst Reg (mov_vec_elem x y 1 0 (VectorSize.Size64x2))))
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| /wasmtime-44.0.1/winch/codegen/src/isa/aarch64/ |
| H A D | asm.rs | 29 PairAMode, ScalarSize, VecLanesOp, VecMisc2, VectorSize,
414 pub fn addv(&mut self, rn: Reg, rd: WritableReg, size: VectorSize) { in addv() argument
919 size: VectorSize::Size8x8, in cnt()
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| H A D | masm.rs | 36 self, Cond, ExtendOp, Imm12, ImmLogic, ImmShift, SImm7Scaled, SImm9, VectorSize,
912 .addv(tmp.inner(), tmp.writable(), VectorSize::Size8x8); in popcnt()
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| /wasmtime-44.0.1/cranelift/codegen/src/isa/aarch64/lower/ |
| H A D | isle.rs | 12 UImm5, UImm12Scaled, VecMisc2, VectorSize, fp_reg, lower_condcode, lower_fp_condcode,
|