Lines Matching refs:VectorSize
135 (vec_dup_from_fpu a (VectorSize.Size8x16) n))
137 (vec_dup_from_fpu a (VectorSize.Size16x8) n))
139 (vec_dup_from_fpu a (VectorSize.Size32x4) n))
141 (vec_dup_from_fpu a (VectorSize.Size64x2) n))
173 (vec_uzp1 a b (VectorSize.Size8x16)))
175 (vec_uzp2 a b (VectorSize.Size8x16)))
177 (vec_uzp1 a b (VectorSize.Size16x8)))
179 (vec_uzp2 a b (VectorSize.Size16x8)))
181 (vec_uzp1 a b (VectorSize.Size32x4)))
183 (vec_uzp2 a b (VectorSize.Size32x4)))
185 (vec_uzp1 a b (VectorSize.Size64x2)))
187 (vec_uzp2 a b (VectorSize.Size64x2)))
192 (vec_zip1 a b (VectorSize.Size8x16)))
194 (vec_zip2 a b (VectorSize.Size8x16)))
196 (vec_zip1 a b (VectorSize.Size16x8)))
198 (vec_zip2 a b (VectorSize.Size16x8)))
200 (vec_zip1 a b (VectorSize.Size32x4)))
202 (vec_zip2 a b (VectorSize.Size32x4)))
210 (vec_trn1 a b (VectorSize.Size8x16)))
212 (vec_trn2 a b (VectorSize.Size8x16)))
214 (vec_trn1 a b (VectorSize.Size16x8)))
216 (vec_trn2 a b (VectorSize.Size16x8)))
218 (vec_trn1 a b (VectorSize.Size32x4)))
220 (vec_trn2 a b (VectorSize.Size32x4)))
230 (rev16 a (VectorSize.Size8x16)))
232 (rev32 a (VectorSize.Size8x16)))
234 (rev32 a (VectorSize.Size16x8)))
236 (rev64 a (VectorSize.Size8x16)))
238 (rev64 a (VectorSize.Size16x8)))
240 (rev64 a (VectorSize.Size32x4)))
306 (let ((x1 Reg (cmeq0 x (VectorSize.Size64x2)))
307 (x2 Reg (addp x1 x1 (VectorSize.Size64x2))))
394 (let ((one Reg (splat_const 1 (VectorSize.Size64x2)))
395 (c Reg (orr_vec x y (VectorSize.Size64x2)))
396 (c Reg (and_vec c one (VectorSize.Size64x2)))
397 (x Reg (ushr_vec_imm x 1 (VectorSize.Size64x2)))
398 (y Reg (ushr_vec_imm y 1 (VectorSize.Size64x2)))
399 (sum Reg (add_vec x y (VectorSize.Size64x2))))
400 (add_vec c sum (VectorSize.Size64x2))))
572 (decl lower_fmla (VecALUModOp Value Value Value VectorSize) Reg)
592 …mla op (bitcast _ _ (shuffle _ x x (shuffle32_from_imm n n n n))) y z size @ (VectorSize.Size32x4))
595 …mla op x (bitcast _ _ (shuffle _ y y (shuffle32_from_imm n n n n))) z size @ (VectorSize.Size32x4))
598 …er_fmla op (bitcast _ _ (shuffle _ x x (shuffle64_from_imm n n))) y z size @ (VectorSize.Size64x2))
601 …er_fmla op x (bitcast _ _ (shuffle _ y y (shuffle64_from_imm n n))) z size @ (VectorSize.Size64x2))
882 (rev Reg (rev64 rm (VectorSize.Size32x4)))
891 (mul Reg (mul rev rn (VectorSize.Size32x4)))
899 (sum Reg (addp mul mul (VectorSize.Size32x4)))
1208 (bsl $I64X2 (vec_rrr (VecALUOp.Cmgt) y x (VectorSize.Size64x2)) x y))
1214 (bsl $I64X2 (vec_rrr (VecALUOp.Cmhi) y x (VectorSize.Size64x2)) x y))
1220 (bsl $I64X2 (vec_rrr (VecALUOp.Cmgt) x y (VectorSize.Size64x2)) x y))
1226 (bsl $I64X2 (vec_rrr (VecALUOp.Cmhi) x y (VectorSize.Size64x2)) x y))
1546 (let ((size VectorSize (vector_size ty))
1655 (let ((size VectorSize (vector_size ty))
1713 (let ((size VectorSize (vector_size ty))
2084 (nbits Reg (vec_cnt tmp (VectorSize.Size8x8))))
2090 (nbits Reg (vec_cnt tmp (VectorSize.Size8x8)))
2091 (added Reg (addp nbits nbits (VectorSize.Size8x8))))
2096 (nbits Reg (vec_cnt tmp (VectorSize.Size8x8)))
2097 (added Reg (addv nbits (VectorSize.Size8x8))))
2102 (nbits Reg (vec_cnt tmp (VectorSize.Size8x8)))
2103 (added Reg (addv nbits (VectorSize.Size8x8))))
2109 (tmp Reg (mov_to_vec tmp_half (value_regs_get val 1) 1 (VectorSize.Size64x2)))
2110 (nbits Reg (vec_cnt tmp (VectorSize.Size8x16)))
2111 (added Reg (addv nbits (VectorSize.Size8x16))))
2115 (vec_cnt x (VectorSize.Size8x16)))
2142 (vec_size VectorSize (vector_size ty)))
2148 (vec_size VectorSize (vector_size ty)))
2154 (vec_size VectorSize (vector_size ty)))
2160 (vec_size VectorSize (vector_size ty)))
2177 (vec_size VectorSize (vector_size ty)))
2183 (vec_size VectorSize (vector_size ty)))
2189 (vec_size VectorSize (vector_size ty)))
2195 (vec_size VectorSize (vector_size ty)))
2443 (let ((dst Reg (mov_vec_elem x y 1 0 (VectorSize.Size64x2))))
2458 (let ((dst Reg (mov_vec_elem x y 1 0 (VectorSize.Size64x2))))
2474 (let ((dst Reg (mov_vec_elem x y 1 0 (VectorSize.Size64x2))))
2494 (let ((tmp Reg (fpu_move_from_vec x 1 (VectorSize.Size32x2))))
2509 (let ((tmp Reg (fpu_move_from_vec x 1 (VectorSize.Size32x2))))
2815 …mov_to_fpu (value_regs_get x 0) (ScalarSize.Size64)) (value_regs_get x 1) 1 (VectorSize.Size64x2)))
2887 (shifted Reg (sshr_vec_imm vec 7 (VectorSize.Size8x16)))
2891 … Reg (and_vec shifted (constant_f128 0x80402010_08040201_80402010_08040201) (VectorSize.Size8x16)))
2897 (zipped Reg (zip1 anded anded_swapped (VectorSize.Size8x16)))
2904 (result Reg (addv zipped (VectorSize.Size16x8))))
2911 (shifted Reg (sshr_vec_imm vec 15 (VectorSize.Size16x8)))
2915 … (and_vec shifted (constant_f128 0x0080_0040_0020_0010_0008_0004_0002_0001) (VectorSize.Size16x8)))
2917 (result Reg (addv anded (VectorSize.Size16x8))))
2924 (shifted Reg (sshr_vec_imm vec 31 (VectorSize.Size32x4)))
2928 … Reg (and_vec shifted (constant_f128 0x00000008_00000004_00000002_00000001) (VectorSize.Size32x4)))
2930 (result Reg (addv anded (VectorSize.Size32x4))))