Home
last modified time | relevance | path

Searched refs:xe (Results 1 – 25 of 55) sorted by relevance

123

/llvm-project-15.0.7/llvm/test/TableGen/
H A DDefmInsideMultiClass.td28 defm SUB : basic_s<0xe>, basic_p<0xe>;
/llvm-project-15.0.7/libclc/generic/lib/math/
H A Dsincos_helpers.cl182 int xe = (int)(as_uint(x) >> 23) - 127;
204 uint fbits = 224 + 23 - xe;
207 // min: 25 (xe=18) max: 134 (xe=127)
271 xe = clz(p7) + 1;
272 shift = 32 - xe;
277 float q1 = as_float(sign | ((127 - xe) << 23) | (p7 >> 9));
285 float q0 = as_float(sign | ((127 - (xe + 23 + xxe)) << 23) | (p7 >> 9));
/llvm-project-15.0.7/llvm/test/Object/Inputs/COFF/
H A Di386.yaml15 VirtualAddress: 0xe
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Daix-rodata-align.ll34 ; CHECK-NEXT: .byte 14 # 0xe
/llvm-project-15.0.7/llvm/test/DebugInfo/COFF/
H A Dinlining.ll83 ; ASM: .short 0xe # Record length
91 ; ASM: .short 0xe # Record length
97 ; ASM: .short 0xe # Record length
H A Dtypes-data-members.ll401 ; ASM: .short 0xe # Record length
487 ; ASM: .short 0xe # Record length
524 ; ASM: .short 0xe # Record length
574 ; ASM: .short 0xe # Record length
645 ; ASM: .short 0xe # Record length
663 ; ASM: .short 0xe # Record length
683 ; ASM: .short 0xe # Record length
724 ; ASM: .short 0xe # Record length
H A Dtypes-basic.ll361 ; ASM: .short 0xe # Record length
369 ; ASM: .short 0xe # Record length
458 ; ASM: .short 0xe # Record length
485 ; ASM: .short 0xe # Record length
508 ; ASM: .short 0xe # Record length
H A Darray-odr-violation.ll21 ; CHECK: .short 0xe # Record length
/llvm-project-15.0.7/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udecl/
H A Dp8-cxx0x.cpp112 Xe xe; // expected-error {{must use 'enum'}} in value_vs_type() local
/llvm-project-15.0.7/llvm/test/Object/
H A Dyaml2obj-readobj.test46 VirtualAddress: 0xe
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFInstrFormats.td48 def BPF_XCHG : BPFArithOp<0xe>;
/llvm-project-15.0.7/clang/test/Parser/
H A Dcxx1z-class-template-argument-deduction.cpp46 XP<ZId<Ts>::Q...> xe; member
/llvm-project-15.0.7/clang/test/CXX/drs/
H A Ddr20xx.cpp34 X<e> xe; // expected-error {{constant expression}} expected-note {{initializer of 'e'}} in f() local
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/
H A Dtrace-regs.txt30 0xe6 0xe 0x31 0xd5
90 0xe 0xc 0x31 0xd5
94 0x1c 0xe 0x31 0xd5
424 0xe 0xd 0x11 0xd5
426 0x8 0xe 0x11 0xd5
H A Dbasic-a64-instructions.txt1227 0xac 0x7d 0xe 0x9b
2367 0x99 0xe 0xd0 0x3c
2370 0x95 0xe 0x90 0x3c
3743 0x8c 0xe 0x10 0xd5
3759 0xac 0xe 0x10 0xd5
3775 0xcc 0xe 0x10 0xd5
3791 0xec 0xe 0x10 0xd5
3998 0x89 0xe 0x30 0xd5
4014 0xa9 0xe 0x30 0xd5
4030 0xc9 0xe 0x30 0xd5
[all …]
H A Darm64-advsimd.txt1810 # CHECK: sqrshrn h0, s0, #0xe
1813 # CHECK: sqrshrun h0, s0, #0xe
1824 # CHECK: sqshrn h0, s0, #0xe
1827 # CHECK: sqshrun h0, s0, #0xe
1836 # CHECK: uqrshrn h0, s0, #0xe
1843 # CHECK: uqshrn h0, s0, #0xe
/llvm-project-15.0.7/llvm/test/DebugInfo/MSP430/
H A Dranges_always.ll106 ; EXPR-SAME: [DW_FORM_exprloc] (DW_OP_addrx 0x0, DW_OP_const4u 0xe, DW_OP_plus)
108 ; FORM-SAME: [DW_FORM_LLVM_addrx_offset] (indexed (00000000) + 0xe address = 0x000e ".text")
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dshuffle-tbl34.ll71 ; CHECK: .byte 14 // 0xe
133 ; CHECK: .byte 14 // 0xe
367 %xe = zext <8 x i8> %x to <8 x i16>
369 …%z = shufflevector <8 x i16> %xe, <8 x i16> %ye, <8 x i32> <i32 0, i32 4, i32 8, i32 12, i32 1, i3…
536 ; CHECK: .byte 14 // 0xe
627 ; CHECK: .byte 14 // 0xe
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AMDGPU/
H A Dmimg_vi.txt11 # VI: image_load v[0:2], v4, s[8:15] dmask:0xe unorm ; encoding: [0x00,0x1e,0x00,0xf0,0x04,0x00,0x0…
23 # VI: image_store v[0:2], v4, s[0:7] dmask:0xe unorm ; encoding: [0x00,0x1e,0x20,0xf0,0x04,0x00,0x0…
206 # VI: image_atomic_cmpswap v[5:6], v1, s[8:15] dmask:0xe unorm ; encoding: [0x00,0x1e,0x44,0xf0,0x0…
/llvm-project-15.0.7/llvm/test/FileCheck/
H A Dnumeric-expression.txt122 1a // CHECK-NEXT: {{^}}[[#%x,LHEX+0xe]]
131 1B // CHECK-NEXT: {{^}}[[#%X,UHEX+0xe]]
220 1a // CHECK-NEXT: {{^}}[[#LHEX+0xe]]
227 1B // CHECK-NEXT: {{^}}[[#UHEX+0xe]]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dneon-vmovn.ll596 ; CHECK-NEXT: .byte 14 @ 0xe
620 ; CHECKBE-NEXT: .byte 14 @ 0xe
646 ; CHECK-NEXT: .byte 14 @ 0xe
670 ; CHECKBE-NEXT: .byte 14 @ 0xe
/llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/
H A Dbb-addr-map.test139 Metadata: 0xe
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dudiv64.ll411 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
436 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
510 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
532 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
561 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
586 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
618 ; GCN-NEXT: s_load_dword s4, s[0:1], 0xe
643 ; GCN-IR-NEXT: s_load_dword s4, s[0:1], 0xe
675 ; GCN-NEXT: s_load_dword s2, s[0:1], 0xe
794 ; GCN-IR-NEXT: s_load_dword s5, s[0:1], 0xe
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dmve-gather-scatter-ptr-address.ll197 ; CHECK-NEXT: .short 14 @ 0xe
563 ; CHECK-NEXT: .short 14 @ 0xe
814 ; CHECK-NEXT: .short 14 @ 0xe
944 ; CHECK-NEXT: .byte 14 @ 0xe
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsInstrFPU.td379 ABSS_FM<0xe, 16>, ISA_MIPS2;
387 defm CEIL_W : ROUND_M<"ceil.w.d", II_CEIL>, ABSS_FM<0xe, 17>, ISA_MIPS2;

123