Searched refs:vload (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | pr45378.ll | 35 %vload = load <2 x i64>, ptr %ptr, align 8 36 %vreduce = call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> %vload) 65 %vload = load <2 x i64>, ptr %ptr, align 8 66 %v1 = extractelement <2 x i64> %vload, i32 0 67 %v2 = extractelement <2 x i64> %vload, i32 1 96 %vload = load <2 x i64>, ptr %ptr, align 8 97 %v1 = extractelement <2 x i64> %vload, i32 0 98 %v2 = extractelement <2 x i64> %vload, i32 1
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| /llvm-project-15.0.7/libclc/generic/include/clc/shared/ |
| H A D | vload.h | 2 …_CLC_OVERLOAD _CLC_DECL VEC_TYPE vload##SUFFIX##WIDTH(size_t offset, const ADDR_SPACE MEM_TYPE *x);
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| /llvm-project-15.0.7/libclc/spirv/lib/ |
| H A D | SOURCES | 89 ../../generic/lib/shared/vload.cl
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| /llvm-project-15.0.7/libclc/spirv64/lib/ |
| H A D | SOURCES | 89 ../../generic/lib/shared/vload.cl
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AMDGPU/ |
| H A D | horizontal-store.ll | 215 %vload = load <2 x i32>, <2 x i32>* bitcast ([32 x i32]* @arr to <2 x i32>*), align 16 216 %elt1 = extractelement <2 x i32> %vload, i32 0 218 %ex0 = extractelement <2 x i32> %vload, i32 0
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| /llvm-project-15.0.7/mlir/lib/Dialect/SparseTensor/Transforms/ |
| H A D | Sparsification.cpp | 849 Value vload = genVectorLoad(codegen, builder, ptr, {s}); in genLoad() local 852 vload = builder.create<arith::ExtUIOp>( in genLoad() 853 loc, vectorType(codegen, builder.getI32Type()), vload); in genLoad() 856 vload = builder.create<arith::ExtUIOp>( in genLoad() 857 loc, vectorType(codegen, builder.getI64Type()), vload); in genLoad() 859 return vload; in genLoad()
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| /llvm-project-15.0.7/libclc/generic/lib/ |
| H A D | SOURCES | 217 shared/vload.cl
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| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | OpenCLBuiltins.td | 850 foreach name = ["vload" # VSize] in { 888 // vload with constant address space is available regardless of version.
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