Home
last modified time | relevance | path

Searched refs:virtReg2Index (Results 1 – 24 of 24) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.h131 auto I = Register::virtReg2Index(VReg); in stackifyVReg()
137 auto I = Register::virtReg2Index(VReg); in unstackifyVReg()
142 auto I = Register::virtReg2Index(VReg); in isVRegStackified()
151 auto I = Register::virtReg2Index(VReg); in setWAReg()
156 auto I = Register::virtReg2Index(VReg); in getWAReg()
H A DWebAssemblyRegColoring.cpp163 LLVM_DEBUG(dbgs() << "Assigning vreg" << Register::virtReg2Index(LI->reg()) in runOnMachineFunction()
164 << " to vreg" << Register::virtReg2Index(New) << "\n"); in runOnMachineFunction()
H A DWebAssemblyReplacePhysRegs.cpp96 << Register::virtReg2Index(VReg) << ")\n"; in runOnMachineFunction()
H A DWebAssemblyExplicitLocals.cpp68 << Register::virtReg2Index(Reg) << '\n'; in checkFrameBase()
310 if (UseEmpty[Register::virtReg2Index(OldReg)]) { in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp200 unsigned MORegIdx = Register::virtReg2Index(MOReg); in addUsedLanesOnOperand()
228 DefinedByCopy[Register::virtReg2Index(MI.getOperand(0).getReg())]); in transferUsedLanes()
285 unsigned DefRegIdx = Register::virtReg2Index(DefReg); in transferDefinedLanesStep()
357 unsigned RegIdx = Register::virtReg2Index(Reg); in determineInitialDefinedLanes()
470 unsigned DefRegIdx = Register::virtReg2Index(DefReg); in isUndefInput()
539 unsigned RegIdx = Register::virtReg2Index(Reg); in runOnce()
H A DRegAllocFast.cpp105 return Register::virtReg2Index(VirtReg); in getSparseSetIndex()
255 return LiveVirtRegs.find(Register::virtReg2Index(VirtReg)); in findLiveVirtReg()
259 return LiveVirtRegs.find(Register::virtReg2Index(VirtReg)); in findLiveVirtReg()
352 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) { in mayLiveOut()
365 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
373 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
384 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
394 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
405 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) in mayLiveIn()
413 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveIn()
H A DTargetRegisterInfo.cpp123 OS << '%' << Register::virtReg2Index(Reg); in printReg()
168 OS << '%' << Register::virtReg2Index(Unit); in printVRegOrUnit()
H A DRegisterScavenging.cpp708 Register::virtReg2Index(Reg) >= InitialNumVirtRegs) in scavengeFrameVirtualRegsInBlock()
728 Register::virtReg2Index(Reg) >= InitialNumVirtRegs) in scavengeFrameVirtualRegsInBlock()
H A DMachineVerifier.cpp2517 unsigned Index = Register::virtReg2Index(Reg); in filterAndAdd()
2540 unsigned Index = Register::virtReg2Index(Reg); in filterAndAdd()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DRegister.h77 static unsigned virtReg2Index(Register Reg) { in virtReg2Index() function
104 return virtReg2Index(Reg); in virtRegIndex()
H A DScheduleDAGInstrs.h61 return Register::virtReg2Index(VirtReg); in getSparseSetIndex()
H A DRegisterPressure.h279 return Register::virtReg2Index(Reg) + NumRegUnits; in getSparseIndexFromReg()
H A DTargetRegisterInfo.h1274 return Register::virtReg2Index(Reg); in operator()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FastPreTileConfig.cpp141 if (MayLiveAcrossBlocks.test(Register::virtReg2Index(VirtReg))) in mayLiveOut()
146 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
155 MayLiveAcrossBlocks.set(Register::virtReg2Index(VirtReg)); in mayLiveOut()
347 MayLiveAcrossBlocks.set(Register::virtReg2Index(InTileReg)); in convertPHI()
H A DX86DomainReassignment.cpp436 if (EnclosedEdges.test(Register::virtReg2Index(Reg))) in visitRegister()
554 EnclosedEdges.set(Register::virtReg2Index(Reg)); in buildClosure()
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/MCTargetDesc/
H A DSPIRVMCCodeEmitter.cpp80 OSE.write<uint32_t>(Register::virtReg2Index(Op.getReg()) + 1); in emitOperand()
H A DSPIRVInstPrinter.cpp254 O << '%' << (Register::virtReg2Index(Op.getReg()) + 1); in printOperand()
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVDuplicatesTracker.cpp89 dbgs() << Register::virtReg2Index(D->lookup(MF)) << ", "; in buildDepsGraph()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64StackTaggingPreRA.cpp293 << Register::virtReg2Index(UseReg) << " in " << UseI in findFirstSlotCandidate()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp170 return Register::virtReg2Index(v); in v2x()
274 unsigned RInd = Register::virtReg2Index(VR); in lookup()
1581 unsigned Idx = Register::virtReg2Index(I->first); in runOnMachineFunction()
H A DBitTracker.cpp87 OS << 'v' << Register::virtReg2Index(PV.R); in operator <<()
H A DHexagonSplitDouble.cpp268 unsigned u = Register::virtReg2Index(T); in partitionRegisters()
H A DHexagonBitSimplify.cpp179 return Register::virtReg2Index(v); in v2x()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp551 << Register::virtReg2Index(Reg) << "\n"); in runOnMachineFunction()