| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 250 MI.getOperand(0).setSubReg(KilledProdSubReg); in processBlock()
251 MI.getOperand(1).setSubReg(KilledProdSubReg); in processBlock()
252 MI.getOperand(3).setSubReg(AddSubReg); in processBlock()
266 MI.getOperand(2).setSubReg(AddSubReg); in processBlock()
271 MI.getOperand(2).setSubReg(OtherProdSubReg); in processBlock()
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| H A D | PPCVSXCopy.cpp | 134 SrcMO.setSubReg(PPC::sub_64); in processBlock()
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| H A D | PPCInstrInfo.cpp | 1213 MI.getOperand(0).setSubReg(SubReg2); in commuteInstructionImpl()
1217 MI.getOperand(2).setSubReg(SubReg1); in commuteInstructionImpl()
1218 MI.getOperand(1).setSubReg(SubReg2); in commuteInstructionImpl()
2759 SubRegsToUpdate[i].first->setSubReg(SubRegsToUpdate[i].second); in optimizeCompareInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | GCNPreRAOptimizations.cpp | 134 I.getOperand(1).setSubReg(DefSrcMO.getSubReg()); in processReg()
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| H A D | SIPreAllocateWWMRegs.cpp | 134 MO.setSubReg(0); in rewriteRegs()
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| H A D | SIFoldOperands.cpp | 735 UseMI->getOperand(1).setSubReg(OpToFold.getSubReg()); in foldOperand()
873 UseMI->getOperand(1).setSubReg(OpToFold.getSubReg()); in foldOperand()
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| H A D | SIInstrInfo.cpp | 2278 NonRegOp.setSubReg(SubReg); in swapRegAndNonRegOperand()
2950 UseMI.getOperand(0).setSubReg(0); in FoldImmediate()
3014 Src0->setSubReg(Src1SubReg); in FoldImmediate()
5171 Src0.setSubReg(Src1.getSubReg()); in legalizeOperandsVOP2()
5176 Src1.setSubReg(Src0SubReg); in legalizeOperandsVOP2()
5448 Op.setSubReg(0); in legalizeGenericOperand()
8491 Op.setSubReg(AMDGPU::sub0); in enforceOperandRCAlignment()
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| H A D | SIPeepholeSDWA.cpp | 248 To.setSubReg(From.getSubReg()); in copyRegOperand()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 610 UseMO->setSubReg(0); in INITIALIZE_PASS_DEPENDENCY()
878 MOSrc.setSubReg(NewSubReg); in RewriteCurrentSource()
968 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1095 MO.setSubReg(NewSubReg); in RewriteCurrentSource()
1261 NewCopy->getOperand(0).setSubReg(Def.SubReg); in rewriteSource()
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| H A D | RegAllocFast.cpp | 860 MO.setSubReg(0); in allocVirtRegUndef()
1016 MO.setSubReg(0); in setPhysReg()
1285 MO.setSubReg(0); in allocateInstruction()
1387 MO.setSubReg(0); in allocateInstruction()
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| H A D | TwoAddressInstructionPass.cpp | 1438 SrcMO.setSubReg(0); in collectTiedOperands()
1563 MO.setSubReg(0); in processTiedPairs()
1577 MO.setSubReg(0); in processTiedPairs()
1800 mi->getOperand(0).setSubReg(SubIdx); in runOnMachineFunction()
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| H A D | TargetInstrInfo.cpp | 227 CommutedMI->getOperand(0).setSubReg(SubReg0); in commuteInstructionImpl()
231 CommutedMI->getOperand(Idx2).setSubReg(SubReg1); in commuteInstructionImpl()
232 CommutedMI->getOperand(Idx1).setSubReg(SubReg2); in commuteInstructionImpl()
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| H A D | MachineOperand.cpp | 82 setSubReg(SubIdx); in substVirtReg()
91 setSubReg(0); in substPhysReg()
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| H A D | VirtRegMap.cpp | 604 MO.setSubReg(0); in rewrite()
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| H A D | MachineSink.cpp | 1087 DbgMO.setSubReg(SrcMO->getSubReg()); in attemptDebugCopyProp()
1544 DbgOp.setSubReg(MI.getOperand(1).getSubReg()); in SalvageUnsunkDebugUsersOfCopy()
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| H A D | LiveDebugVariables.cpp | 1363 MO.setSubReg(locations[OldLocNo].getSubReg()); in splitLocation()
1549 Loc.setSubReg(0); in rewriteLocations()
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| H A D | TailDuplicator.cpp | 437 MO.setSubReg(TRI->composeSubRegIndices(MO.getSubReg(), in duplicateInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | RDFCopy.cpp | 181 Op.setSubReg(0); in run()
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| H A D | HexagonBitSimplify.cpp | 408 I->setSubReg(NewSR); in replaceRegWithSub()
427 I->setSubReg(NewSR); in replaceSubWithSub()
1966 ValOp.setSubReg(H.Sub); in genStoreUpperHalf()
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| H A D | HexagonExpandCondsets.cpp | 926 Op.setSubReg(RN.Sub); in renameInRange()
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| H A D | HexagonSplitDouble.cpp | 1091 Op.setSubReg(0); in replaceSubregUses()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 480 void setSubReg(unsigned subReg) { in setSubReg() function
822 Op.setSubReg(SubReg);
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| H A D | MachineInstr.h | 1832 MO.setSubReg(0);
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86DomainReassignment.cpp | 513 MO.setSubReg(0); in reassign()
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| H A D | X86InstructionSelector.cpp | 291 I.getOperand(1).setSubReg(getSubRegIndex(DstRC)); in selectCopy()
768 I.getOperand(1).setSubReg(SubIdx); in selectTruncOrPtrToInt()
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