Home
last modified time | relevance | path

Searched refs:regsOverlap (Results 1 – 25 of 47) sorted by relevance

12

/llvm-project-15.0.7/llvm/unittests/Target/AArch64/
H A DMatrixRegisterAliasing.cpp43 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZA, AArch64::ZAB0)); in TEST()
46 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAB0, AArch64::ZAQ0)); in TEST()
48 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAB0, AArch64::ZAD0)); in TEST()
49 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAB0, AArch64::ZAD7)); in TEST()
50 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAB0, AArch64::ZAS0)); in TEST()
51 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAB0, AArch64::ZAS3)); in TEST()
52 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAB0, AArch64::ZAH0)); in TEST()
53 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAB0, AArch64::ZAH1)); in TEST()
56 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAH0, AArch64::ZAQ0)); in TEST()
57 ASSERT_TRUE(TRI.regsOverlap(AArch64::ZAH0, AArch64::ZAQ2)); in TEST()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.cpp879 if (Use.isReg() && TRI->regsOverlap(Def, Use.getReg())) in checkVALUHazards()
916 if (Use.isReg() && TRI->regsOverlap(Def, Use.getReg())) in checkVALUHazards()
1698 if (TRI->regsOverlap(PrevDstReg, CurSrc0Reg) || in fixWMMAHazards()
1699 TRI->regsOverlap(PrevDstReg, CurSrc1Reg)) { in fixWMMAHazards()
1710 TRI->regsOverlap(PrevDstReg, CurSrc2Reg)) { in fixWMMAHazards()
1896 return TRI.regsOverlap(DstReg, Reg); in checkMAIHazards908()
1938 return TRI.regsOverlap(Reg, DstReg); in checkMAIHazards908()
1973 return TRI.regsOverlap(Reg, DstReg); in checkMAIHazards908()
2070 return TRI.regsOverlap(DstReg, Reg); in checkMAIHazards90A()
2279 !TRI.regsOverlap(MI.getOperand(0).getReg(), Reg)) in checkMAIVALUHazards()
[all …]
H A DSIPostRABundler.cpp84 if (TRI->regsOverlap(Reg, Def)) in isDependentLoad()
H A DSIShrinkInstructions.cpp518 if (TRI->regsOverlap(Reg, MO.getReg())) in instAccessReg()
700 if (Op.isKill() && TRI->regsOverlap(X, Op.getReg())) in matchSwap()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86CallingConv.cpp167 if (TRI->regsOverlap(Reg, X86::XMM4) || in CC_X86_64_VectorCall()
168 TRI->regsOverlap(Reg, X86::XMM5)) in CC_X86_64_VectorCall()
H A DX86FixupLEAs.cpp444 if (TRI->regsOverlap(DestReg, Opnd.getReg())) in searchALUInst()
473 if (TRI->regsOverlap(Reg, AluDestReg)) in checkRegUsage()
475 if (TRI->regsOverlap(Reg, BaseReg)) { in checkRegUsage()
481 if (TRI->regsOverlap(Reg, IndexReg)) { in checkRegUsage()
H A DX86CallFrameOptimization.cpp341 if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister())) in classifyInstruction()
345 if (RegInfo.regsOverlap(Reg, U)) in classifyInstruction()
H A DX86FixupBWInsts.cpp276 TRI->regsOverlap(SuperDestReg, MO.getReg())) in getSuperRegDestIfDead()
H A DX86LoadValueInjectionLoadHardening.cpp791 TRI->regsOverlap(BaseMO.getReg(), Reg)) || in instrUsesRegToAccessMemory()
793 TRI->regsOverlap(IndexMO.getReg(), Reg)); in instrUsesRegToAccessMemory()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DProcessImplicitDefs.cpp112 !TRI->regsOverlap(Reg, UserReg)) in processImplicitDef()
H A DMachineCopyPropagation.cpp534 MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg())) in hasImplicitOverlap()
548 TRI->regsOverlap(Def, MIDef.getReg())) in hasOverlappingMultipleDef()
663 if (!TRI->regsOverlap(RegDef, RegSrc)) { in ForwardCopyPropagateBlock()
933 if (!TRI->regsOverlap(DefReg, SrcReg)) { in BackwardCopyPropagateBlock()
H A DExpandPostRAPseudos.cpp76 if (MO.isKill() && TRI->regsOverlap(DstReg, MO.getReg())) in TransferImplicitOperands()
H A DCriticalAntiDepBreaker.cpp431 if (TRI->regsOverlap(NewReg, R)) { in findSuitableFreeRegister()
623 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
H A DReachingDefAnalysis.cpp37 return TRI->regsOverlap(MO.getReg(), PhysReg); in isValidRegUseOf()
48 return TRI->regsOverlap(MO.getReg(), PhysReg); in isValidRegDefOf()
H A DMachineInstrBundle.cpp334 if (!TRI->regsOverlap(MOReg, Reg)) in AnalyzePhysRegInBundle()
H A DCallingConvLower.cpp74 if (ValAssign.isRegLoc() && TRI.regsOverlap(ValAssign.getLocReg(), Reg)) in IsShadowAllocatedReg()
H A DRegAllocPBQP.cpp418 if (TRI.regsOverlap(PRegN, PRegM)) { in createInterferenceEdge()
585 if (TRI.regsOverlap(Reg, CSR[i])) in isACalleeSavedRegister()
H A DMachineInstr.cpp954 if (MOReg == Reg || (TRI && Reg && MOReg && TRI->regsOverlap(MOReg, Reg))) in findRegisterUseOperandIdx()
1009 Found = TRI->regsOverlap(MOReg, Reg); in findRegisterDefOperandIdx()
1896 if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg) in clearRegisterKills()
2002 [&](MCRegister Use) { return TRI.regsOverlap(Use, Reg); })) in setPhysRegsDeadExcept()
H A DTwoAddressInstructionPass.cpp442 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible()
461 if (TRI->regsOverlap(ToReg, Reg)) in removeMapRegEntry()
518 if (TRI->regsOverlap(R, Reg)) in regOverlapsSet()
/llvm-project-15.0.7/llvm/lib/MC/
H A DMCRegisterInfo.cpp126 bool MCRegisterInfo::regsOverlap(MCRegister RegA, MCRegister RegB) const { in regsOverlap() function in MCRegisterInfo
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64LoadStoreOptimizer.cpp805 TRI->regsOverlap(MOP.getReg(), DefReg); in forAllMIsUntilDef()
873 TRI->regsOverlap(MOP.getReg(), RegToRename)) { in mergePairedInsns()
884 TRI->regsOverlap(MOP.getReg(), RegToRename)) { in mergePairedInsns()
908 !TRI->regsOverlap(MOP.getReg(), *RenameReg); in mergePairedInsns()
1354 TRI->regsOverlap(RegToRename, MOP.getReg()); in canRenameUpToDef()
1419 !TRI->regsOverlap(MOP.getReg(), RegToRename)) in canRenameUpToDef()
1432 !TRI->regsOverlap(MOP.getReg(), RegToRename)) in canRenameUpToDef()
1604 TRI->regsOverlap(getLdStRegOp(MI).getReg(), in findMatchingInsn()
H A DAArch64PBQPRegAlloc.cpp196 if (livesOverlap && TRI->regsOverlap(pRd, pRa)) in addIntraChainConstraint()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp109 if (regsOverlap(Reg, TRC.getRegister(i))) { in getRegisterOrder()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h419 bool regsOverlap(Register RegA, Register RegB) const { in regsOverlap() function
423 return MCRegisterInfo::regsOverlap(RegA.asMCReg(), RegB.asMCReg()); in regsOverlap()
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCRegisterInfo.h585 bool regsOverlap(MCRegister RegA, MCRegister RegB) const;

12