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Searched refs:phases (Results 1 – 25 of 31) sorted by relevance

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/llvm-project-15.0.7/clang/include/clang/Driver/
H A DTypes.def39 … PP_C, "c", phases::Preprocess, phases::Compile, phases::Backend, phases:…
40 … PP_C, "cl", phases::Preprocess, phases::Compile, phases::Backend, phases:…
41 …X, PP_CXX, "clcpp", phases::Preprocess, phases::Compile, phases::Backend, phases:…
43 …, PP_CUDA, "cu", phases::Preprocess, phases::Compile, phases::Backend, phases:…
44 …_DEVICE, PP_CUDA, "cu", phases::Preprocess, phases::Compile, phases::Backend, phases:…
46 … PP_HIP, "cu", phases::Preprocess, phases::Compile, phases::Backend, phases:…
47 …DEVICE, PP_HIP, "cu", phases::Preprocess, phases::Compile, phases::Backend, phases:…
50 …, PP_ObjC, "m", phases::Preprocess, phases::Compile, phases::Backend, phases:…
52 … PP_CXX, "cpp", phases::Preprocess, phases::Compile, phases::Backend, phases:…
55 …XX, PP_ObjCXX, "mm", phases::Preprocess, phases::Compile, phases::Backend, phases:…
[all …]
H A DTypes.h113 llvm::SmallVector<phases::ID, phases::MaxNumberOfPhases>
114 getCompilationPhases(ID Id, phases::ID LastPhase = phases::IfsMerge);
115 llvm::SmallVector<phases::ID, phases::MaxNumberOfPhases>
H A DPhases.h14 namespace phases {
H A DDriver.h289 phases::ID getFinalPhase(const llvm::opt::DerivedArgList &DAL,
586 Compilation &C, const llvm::opt::ArgList &Args, phases::ID Phase,
/llvm-project-15.0.7/clang/test/Driver/
H A Dhip-phases.hip1 // Tests the phases generated for a CUDA offloading target for different
12 // RUN: %clang -x hip -target x86_64-unknown-linux-gnu -ccc-print-phases \
15 // RUN: %clang -x hip -target x86_64-unknown-linux-gnu -ccc-print-phases \
19 // RUN: %clang -x hip -target x86_64-unknown-linux-gnu -ccc-print-phases \
51 // RUN: %clang -x hip -target x86_64-unknown-linux-gnu -ccc-print-phases \
66 // RUN: %clang -x hip -target x86_64-unknown-linux-gnu -ccc-print-phases \
70 // RUN: %clang -x hip -target x86_64-unknown-linux-gnu -ccc-print-phases \
352 // RUN: -ccc-print-phases --cuda-gpu-arch=gfx803 %s \
357 // RUN: -ccc-print-phases --cuda-gpu-arch=gfx803 %s \
365 // RUN: -ccc-print-phases --cuda-gpu-arch=gfx803 %s \
[all …]
H A Dhip-inputs.hip4 // RUN: %clang -ccc-print-phases -target x86_64-linux-gnu \
10 // RUN: not %clang -ccc-print-phases -target x86_64-linux-gnu \
16 // RUN: not %clang -ccc-print-phases -target x86_64-linux-gnu \
/llvm-project-15.0.7/clang/lib/Driver/
H A DTypes.cpp31 constexpr PhasesBitSet(std::initializer_list<phases::ID> Phases) { in PhasesBitSet()
35 bool contains(phases::ID Id) const { return Bits & (1 << Id); } in contains()
58 assert((getInfo(Id).Phases.contains(phases::Preprocess) != in getPreprocessedType()
101 return getInfo(Id).Phases.contains(phases::Precompile) && in onlyPrecompileType()
373 llvm::SmallVector<phases::ID, phases::MaxNumberOfPhases>
374 types::getCompilationPhases(ID Id, phases::ID LastPhase) { in getCompilationPhases()
375 llvm::SmallVector<phases::ID, phases::MaxNumberOfPhases> P; in getCompilationPhases()
378 if (Info.Phases.contains(static_cast<phases::ID>(I))) in getCompilationPhases()
379 P.push_back(static_cast<phases::ID>(I)); in getCompilationPhases()
380 assert(P.size() <= phases::MaxNumberOfPhases && "Too many phases in list"); in getCompilationPhases()
[all …]
H A DDriver.cpp332 phases::ID FinalPhase; in getFinalPhase()
2690 phases::ID CurPhase, phases::ID FinalPhase, in getDeviceDependences()
3060 phases::ID CurPhase, phases::ID FinalPhase, in getDeviceDependences()
3210 phases::ID CurPhase, phases::ID FinalPhase, in getDeviceDependences()
3420 phases::ID CurPhase, phases::ID FinalPhase, in getDeviceDependences()
3647 phases::ID CurPhase, phases::ID FinalPhase, in addDeviceDependencesToHostAction()
4213 Args.hasArg(options::OPT_c) ? phases::Compile : phases::IfsMerge); in BuildActions()
4553 case phases::Link: in ConstructPhaseAction()
4555 case phases::IfsMerge: in ConstructPhaseAction()
4610 case phases::Compile: { in ConstructPhaseAction()
[all …]
H A DPhases.cpp15 const char *phases::getPhaseName(ID Id) { in getPhaseName()
/llvm-project-15.0.7/polly/lib/External/ppcg/
H A Dhybrid.c2092 isl_union_set_list *phases; in ppcg_ht_bounds_insert_tiling() local
2120 phases = isl_union_set_list_alloc(ctx, 2); in ppcg_ht_bounds_insert_tiling()
2121 phases = isl_union_set_list_add(phases, phase0); in ppcg_ht_bounds_insert_tiling()
2122 phases = isl_union_set_list_add(phases, phase1); in ppcg_ht_bounds_insert_tiling()
2129 node = isl_schedule_node_insert_sequence(node, phases); in ppcg_ht_bounds_insert_tiling()
/llvm-project-15.0.7/clang/docs/
H A DDriverInternals.rst175 ``-ccc-print-phases`` flag. For example:
179 $ clang -ccc-print-phases -x c t.c -x assembler t.s
199 $ clang -ccc-print-phases -c -arch i386 -arch x86_64 t0.c t1.c
314 phases are platform neutral, with a few very well defined exceptions
H A DOffloadingDesign.rst462 ``-ccc-print-phases`` option in Clang. This matches the description in
467 $ clang++ -fopenmp -fopenmp-targets=nvptx64 -ccc-print-phases zaxpy.cpp
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/X86/
H A Dconsecutive-ptr-cg-bug.ll16 ; during legal/cost model phases (original scalar loop). Unfortunately, that
/llvm-project-15.0.7/polly/docs/
H A DArchitecture.rst21 phases. The first phase, we call it here **Canonicalization**, is a scalar
/llvm-project-15.0.7/llvm/docs/TableGen/
H A DBackGuide.rst817 used by the various phases of parsing the source files and running the
818 selected backend. This feature is enabled with the ``--time-phases`` option
841 divided into phases and each one timed separately. This is the timing for
860 The backend has been divided into four phases and timed separately.
/llvm-project-15.0.7/llvm/docs/CommandGuide/
H A Dtblgen.rst94 .. option:: -time-phases
96 Time the parser and backend phases and print a report.
/llvm-project-15.0.7/llvm/docs/
H A DReleaseProcess.rst96 This script builds three phases of Clang+LLVM twice each (Release and
H A DLinkTimeOptimization.rst146 during various linking phases.
H A DHowToReleaseLLVM.rst330 was created. As with all phases, release managers and code owners can reject
H A DCodeGenerator.rst53 4. `Target-independent algorithms`_ used to implement various phases of native
742 This section documents the phases described in the `high-level design of the
773 well-suited to other phases of code generation; in particular, instruction
817 SREM or UREM operation. The `legalize types`_ and `legalize operations`_ phases
979 natively supported. The introduction of the Legalize phases allows all of the
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Linalg/
H A DPasses.td153 divided into 2 main logical phases:
/llvm-project-15.0.7/openmp/runtime/src/
H A Dkmp_itt.inl392 A barrier consists of two phases:
400 * __kmp_itt_barrier_middle() -- between gather and release phases.
/llvm-project-15.0.7/llvm/docs/GlobalISel/
H A DLegalizer.rst18 As opposed to SelectionDAG, there are no legalization phases. In particular,
/llvm-project-15.0.7/mlir/docs/Rationale/
H A DRationaleSimplifiedPolyhedralForm.md407 1. Target specific lowering phases for tiling, and vectorization and other 2D
/llvm-project-15.0.7/llvm/docs/tutorial/MyFirstLanguageFrontend/
H A DLangImpl02.rst55 value of the literal as an instance variable. This allows later phases

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