| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/ARM/ |
| H A D | mve-vldn.ll | 12 define void @vld2(half* nocapture readonly %pIn, half* nocapture %pOut, i32 %numRows, i32 %numCols,…
16 %mul = mul i32 %numCols, %numRows
46 define void @vld4(half* nocapture readonly %pIn, half* nocapture %pOut, i32 %numRows, i32 %numCols,…
50 %mul = mul i32 %numCols, %numRows
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| /llvm-project-15.0.7/mlir/lib/Analysis/Presburger/ |
| H A D | IntegerRelation.cpp | 494 unsigned numCols = getNumCols(); in hasInvalidConstraint() local
498 for (j = 0; j < numCols - 1; ++j) { in hasInvalidConstraint()
504 if (j < numCols - 1) { in hasInvalidConstraint()
509 int64_t v = isEq ? atEq(i, numCols - 1) : atIneq(i, numCols - 1); in hasInvalidConstraint()
544 unsigned numCols = constraints->getNumCols(); in eliminateFromConstraint() local
545 for (unsigned j = 0; j < numCols; ++j) { in eliminateFromConstraint()
657 unsigned numCols = getNumCols(); in isEmptyByGCDTest() local
660 for (unsigned j = 1; j < numCols - 1; ++j) { in isEmptyByGCDTest()
663 int64_t v = std::abs(atEq(i, numCols - 1)); in isEmptyByGCDTest()
959 unsigned numCols = getNumCols(); in gcdTightenInequalities() local
[all …]
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| H A D | Simplex.cpp | 947 for (unsigned col = 1, numCols = getNumColumns(); col < numCols; ++col) { in pivot() local
2106 for (unsigned col = 0, numCols = getNumColumns(); col < numCols; ++col) in print() local
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| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/ |
| H A D | 2010-02-24-BigStack.ll | 7 define void @FindMin(double* %panelTDEL, i8* %dclOfRow, i32 %numRows, i32 %numCols, double* %retMin…
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| H A D | mve-vldst4.ll | 4 …half* nocapture readonly %pIn, half* nocapture %pOut, i32 %numRows, i32 %numCols, i32 %scale.coerc…
126 %mul = mul i32 %numCols, %numRows
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| H A D | mve-float16regloops.ll | 699 …pPRT_in, half* noalias nocapture readnone %pPRT_pDst, i32 %numRows, i32 %numCols, i32 %l) local_un…
734 %cmp1 = icmp sgt i32 %numCols, 0
736 %rem = and i32 %numCols, 7
739 %cmp3 = icmp slt i32 %l, %numCols
748 %scevgep = getelementptr half, half* %pPRT_in.addr.035.us, i32 %numCols
766 %5 = icmp eq i32 %index.next, %numCols
771 %scevgep40 = getelementptr half, half* %pInT1.addr.038.us, i32 %numCols
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| H A D | mve-float32regloops.ll | 699 …PRT_in, float* noalias nocapture readnone %pPRT_pDst, i32 %numRows, i32 %numCols, i32 %l) local_un…
734 %cmp1 = icmp sgt i32 %numCols, 0
736 %rem = and i32 %numCols, 7
739 %cmp3 = icmp slt i32 %l, %numCols
748 %scevgep = getelementptr float, float* %pPRT_in.addr.035.us, i32 %numCols
766 %5 = icmp eq i32 %index.next, %numCols
771 %scevgep40 = getelementptr float, float* %pInT1.addr.038.us, i32 %numCols
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| /llvm-project-15.0.7/mlir/lib/Dialect/Affine/Analysis/ |
| H A D | AffineAnalysis.cpp | 383 unsigned numCols = dependenceDomain->getNumCols(); in addOrderingConstraints() local
384 SmallVector<int64_t, 4> eq(numCols); in addOrderingConstraints()
393 eq[numCols - 1] = -1; in addOrderingConstraints()
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | lsr-setupcost.ll | 57 …%numCols = getelementptr inbounds %struct.arm_matrix_instance_q15, %struct.arm_matrix_instance_q15…
58 %i1 = load i16, i16* %numCols, align 2
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/ |
| H A D | maximize-bandwidth-invalidate.ll | 19 …* nocapture noundef readonly %pInA3, i8* nocapture noundef readonly %pInA4, i32 noundef %numCols) {
78 %and = and i32 %numCols, 3
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/PowerPC/ |
| H A D | reg-usage.ll | 247 define void @fp16_(half* nocapture readonly %pIn, half* nocapture %pOut, i32 %numRows, i32 %numCols…
256 %mul = mul i32 %numCols, %numRows
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