| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 138 if (Register::isVirtualRegister(Reg)) in usesRegClass() 154 if (!Register::isVirtualRegister(SReg)) in getPrefSPRLane() 168 if (Register::isVirtualRegister(SReg)) { in getPrefSPRLane() 193 if (!Register::isVirtualRegister(Reg)) in eraseInstrWithNoUses() 215 if (!Register::isVirtualRegister(DefReg)) { in eraseInstrWithNoUses() 249 if (Register::isVirtualRegister(DPRReg) && Register::isVirtualRegister(SPRReg)) { in optimizeSDPattern() 299 if (!Register::isVirtualRegister(OpReg)) in optimizeSDPattern() 343 if (!Register::isVirtualRegister(MI->getOperand(1).getReg())) in elideCopies() 369 if (!Register::isVirtualRegister(Reg)) { in elideCopiesAndPHIs() 378 if (!Register::isVirtualRegister(MI->getOperand(1).getReg())) in elideCopiesAndPHIs() [all …]
|
| H A D | MLxExpansionPass.cpp | 100 if (Register::isVirtualRegister(Reg)) { in getAccDefMI() 106 if (Register::isVirtualRegister(Reg)) { in getAccDefMI() 156 if (Register::isVirtualRegister(SrcReg)) { in hasLoopHazard() 164 if (Register::isVirtualRegister(Reg)) { in hasLoopHazard() 170 if (Register::isVirtualRegister(Reg)) { in hasLoopHazard()
|
| H A D | Thumb2InstrInfo.cpp | 191 if (Register::isVirtualRegister(SrcReg)) { in storeRegToStackSlot() 232 if (Register::isVirtualRegister(DestReg)) { in loadRegFromStackSlot() 721 (Register::isVirtualRegister(FrameReg) || in rewriteT2FrameIndex() 723 if (Register::isVirtualRegister(FrameReg)) { in rewriteT2FrameIndex() 762 return Offset == 0 && (Register::isVirtualRegister(FrameReg) || in rewriteT2FrameIndex()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MachineCSE.cpp | 177 if (!Register::isVirtualRegister(Reg)) in INITIALIZE_PASS_DEPENDENCY() 184 if (!Register::isVirtualRegister(SrcReg)) in INITIALIZE_PASS_DEPENDENCY() 293 if (Register::isVirtualRegister(Reg)) in hasLivePhysRegDefUses() 312 if (Register::isVirtualRegister(Reg)) in hasLivePhysRegDefUses() 387 if (Register::isVirtualRegister(MOReg)) in PhysRegDefsReach() 443 if (Register::isVirtualRegister(CSReg) && Register::isVirtualRegister(Reg)) { in isProfitableToCSE() 471 if (MO.isReg() && MO.isUse() && Register::isVirtualRegister(MO.getReg())) { in isProfitableToCSE() 635 assert(Register::isVirtualRegister(OldReg) && in ProcessBlockCSE() 636 Register::isVirtualRegister(NewReg) && in ProcessBlockCSE() 798 if (!Register::isVirtualRegister(def.getReg())) in isPRECandidate() [all …]
|
| H A D | DetectDeadLanes.cpp | 192 if (!Register::isVirtualRegister(MOReg)) in addUsedLanesOnOperand() 216 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg())) in transferUsedLanesStep() 283 if (!Register::isVirtualRegister(DefReg)) in transferDefinedLanesStep() 384 assert(Register::isVirtualRegister(MOReg)); in determineInitialDefinedLanes() 428 if (Register::isVirtualRegister(DefReg)) { in determineInitialUsedLanes() 468 if (!Register::isVirtualRegister(DefReg)) in isUndefInput() 480 if (Register::isVirtualRegister(MOReg)) { in isUndefInput() 537 if (!Register::isVirtualRegister(Reg)) in runOnce()
|
| H A D | MIRCanonicalizerPass.cpp | 158 if (Register::isVirtualRegister(MO.getReg())) in rescheduleCanonically() 175 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg())) in rescheduleCanonically() 188 if (!Register::isVirtualRegister(II->getOperand(i).getReg())) in rescheduleCanonically() 310 if (!Register::isVirtualRegister(Dst)) in propagateLocalCopies() 312 if (!Register::isVirtualRegister(Src)) in propagateLocalCopies()
|
| H A D | MIRVRegNamerUtils.cpp | 79 if (Register::isVirtualRegister(MO.getReg())) in getInstructionOpcodeHash() 139 assert(Register::isVirtualRegister(VReg) && "Expected Virtual Registers"); in createVirtualRegister() 156 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg())) in renameInstsInMBB()
|
| H A D | OptimizePHIs.cpp | 120 Register::isVirtualRegister(SrcMI->getOperand(1).getReg())) { in IsSingleValuePHICycle() 145 assert(Register::isVirtualRegister(DstReg) && in IsDeadPHICycle()
|
| H A D | RegisterScavenging.cpp | 311 if (Register::isVirtualRegister(MO.getReg())) { in findSurvivorReg() 416 if (MO.isReg() && Register::isVirtualRegister(MO.getReg())) { in findSurvivorBackwards() 529 !Register::isVirtualRegister(MO.getReg())) in scavengeRegister() 707 if (!Register::isVirtualRegister(Reg) || in scavengeFrameVirtualRegsInBlock() 727 if (!Register::isVirtualRegister(Reg) || in scavengeFrameVirtualRegsInBlock() 746 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg())) in scavengeFrameVirtualRegsInBlock()
|
| H A D | MachineStableHash.cpp | 66 if (Register::isVirtualRegister(MO.getReg())) { in stableHashValue() 168 Register::isVirtualRegister(MO.getReg())) in stableHashValue()
|
| H A D | TargetInstrInfo.cpp | 458 assert(Register::isVirtualRegister(FoldReg) && "Cannot fold physregs"); in canFoldCopy() 708 if (Op1.isReg() && Register::isVirtualRegister(Op1.getReg())) in hasReassociableOperands() 710 if (Op2.isReg() && Register::isVirtualRegister(Op2.getReg())) in hasReassociableOperands() 848 if (Register::isVirtualRegister(RegA)) in reassociateOps() 850 if (Register::isVirtualRegister(RegB)) in reassociateOps() 852 if (Register::isVirtualRegister(RegX)) in reassociateOps() 854 if (Register::isVirtualRegister(RegY)) in reassociateOps() 856 if (Register::isVirtualRegister(RegC)) in reassociateOps() 932 if (Register::isVirtualRegister(DefReg) && MI.getOperand(0).getSubReg() && in isReallyTriviallyReMaterializableGeneric()
|
| H A D | MachineLICM.cpp | 847 if (!Register::isVirtualRegister(Reg)) in calcRegisterCost() 919 if (Register::isVirtualRegister(Reg)) in isInvariantStore() 921 if (Register::isVirtualRegister(Reg)) in isInvariantStore() 950 if (Register::isVirtualRegister(CopySrcReg)) in isCopyFeedingInvariantStore() 958 assert(Register::isVirtualRegister(CopyDstReg) && in isCopyFeedingInvariantStore() 1023 if (!Register::isVirtualRegister(Reg)) in HasLoopPHIUse() 1186 if (!Register::isVirtualRegister(Reg)) in IsProfitableToHoist()
|
| H A D | CalcSpillWeights.cpp | 64 if (Register::isVirtualRegister(HReg)) in copyHint() 110 if (!Register::isVirtualRegister(Reg) || VRM.getOriginal(Reg) != Original) in isRematerializable()
|
| H A D | LiveVariables.cpp | 538 if (Register::isVirtualRegister(MOReg)) in runOnInstr() 550 if (Register::isVirtualRegister(MOReg)) in runOnInstr() 765 if (Register::isVirtualRegister(Reg)) { in removeVirtualRegistersKilled() 853 if (Op.isReg() && Register::isVirtualRegister(Op.getReg())) { in addNewBlock()
|
| H A D | ProcessImplicitDefs.cpp | 85 if (Register::isVirtualRegister(Reg)) { in processImplicitDef()
|
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | Register.h | 71 static bool isVirtualRegister(unsigned Reg) { in isVirtualRegister() function 78 assert(isVirtualRegister(Reg) && "Not a virtual register"); in virtReg2Index() 92 return isVirtualRegister(Reg); in isVirtual()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 167 if (!Register::isVirtualRegister(Reg)) in getVRegDefOrNull() 294 if (!Register::isVirtualRegister(RegOp)) in collectUnprimedAccPHIs() 302 if (!Register::isVirtualRegister(Reg) || in collectUnprimedAccPHIs() 449 if (!Register::isVirtualRegister(Src) || in simplifyCode() 450 !Register::isVirtualRegister(Dst)) in simplifyCode() 649 if (!Register::isVirtualRegister(TrueReg)) in simplifyCode() 713 if (!Register::isVirtualRegister(TrueReg)) in simplifyCode() 888 if (!Register::isVirtualRegister(SrcReg)) in simplifyCode() 904 if (Register::isVirtualRegister(CopyReg)) in simplifyCode() 1599 if (!Register::isVirtualRegister(SrcReg)) in emitRLDICWhenLoweringJumpTables() [all …]
|
| H A D | PPCMacroFusion.cpp | 108 return Register::isVirtualRegister(RA.getReg()) || in checkOpConstraints() 118 if (!Register::isVirtualRegister(RT.getReg())) in checkOpConstraints() 172 (!Register::isVirtualRegister(BT.getReg()) && BT.getReg() != PPC::CR0)) in checkOpConstraints() 184 (!Register::isVirtualRegister(BT.getReg()) && BT.getReg() != PPC::CR0)) in checkOpConstraints()
|
| H A D | PPCBranchCoalescing.cpp | 365 Register::isVirtualRegister(Op1.getReg()) && in identicalOperands() 366 Register::isVirtualRegister(Op2.getReg())) { in identicalOperands() 466 if (Use.isReg() && Register::isVirtualRegister(Use.getReg())) { in canMoveToEnd()
|
| H A D | PPCVSXFMAMutate.cpp | 131 if (Register::isVirtualRegister(AddendSrcReg)) { in processBlock() 212 if (Register::isVirtualRegister(AddendSrcReg) && in processBlock()
|
| H A D | PPCVSXCopy.cpp | 53 if (Register::isVirtualRegister(Reg)) { in IsRegInClass()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64StackTaggingPreRA.cpp | 189 Register::isVirtualRegister(UseI.getOperand(0).getReg())) { in uncheckUsesOf() 269 if (!Register::isVirtualRegister(RetagReg)) in findFirstSlotCandidate() 288 if (Register::isVirtualRegister(DstReg)) in findFirstSlotCandidate()
|
| H A D | AArch64AdvSIMDScalarPass.cpp | 108 if (Register::isVirtualRegister(Reg)) in isGPR64() 115 if (Register::isVirtualRegister(Reg)) in isFPR64()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InstructionSelect.cpp | 232 if (Register::isVirtualRegister(SrcReg) && in runOnMachineFunction() 233 Register::isVirtualRegister(DstReg)) { in runOnMachineFunction()
|
| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPeephole.cpp | 86 if (Op.isReg() && Register::isVirtualRegister(Op.getReg())) { in isCVTAToLocalCombinationCandidate()
|