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Searched refs:is128BitVector (Results 1 – 15 of 15) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DValueTypes.h185 bool is128BitVector() const { in is128BitVector() function
186 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h151 if (LocVT == MVT::f128 || LocVT.is128BitVector()) { in CC_XPLINK64_Shadow_Reg()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.cpp141 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
H A DAArch64ISelLowering.cpp4177 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in addRequiredExtensionForVectorMULL()
4350 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
5849 else if (RegVT == MVT::f128 || RegVT.is128BitVector()) in LowerFormalArguments()
10331 if (!Extract.getOperand(0).getValueType().is128BitVector()) in constructDup()
10352 V.getOperand(0).getValueType().is128BitVector()) { in constructDup()
11837 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
14669 if (!VT.is64BitVector() && !VT.is128BitVector()) in tryCombineToBSL()
14972 if (!VT.is64BitVector() && !VT.is128BitVector()) in performANDCombine()
15855 if (!VT.is128BitVector()) { in performAddSubLongCombine()
17432 if (!VT.is128BitVector() && !VT.is64BitVector()) in performPostLD1Combine()
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H A DAArch64FastISel.cpp2926 VT.is128BitVector()) in fastLowerArguments()
2972 } else if (VT.is128BitVector()) { in fastLowerArguments()
H A DAArch64ISelDAGToDAG.cpp172 if (!VT.is64BitVector() || !LVT.is128BitVector() || in SelectExtractHigh()
1445 } else if (VT.is128BitVector()) { in tryIndexedLoad()
H A DAArch64TargetTransformInfo.cpp2292 LT.second.is128BitVector() && (!Alignment || *Alignment < Align(16))) { in getMemoryOpCost()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp8981 if (!VT.is128BitVector()) in LowerBuildVectorv4x32()
13500 assert(VT.is128BitVector() && in lowerShuffleAsByteRotate()
14273 if (!VT.is128BitVector()) in lowerShuffleAsElementInsertion()
14760 assert(VT.is128BitVector() && in lowerShuffleAsPermuteAndUnpack()
19490 if (VT.is128BitVector()) in lowerVECTOR_SHUFFLE()
20112 if (!OpVT.is128BitVector()) { in LowerSCALAR_TO_VECTOR()
21987 if (SrcVT.is128BitVector()) { in truncateVectorWithPACK()
22142 VT.is128BitVector()) { in LowerTRUNCATE()
25488 assert(VT.is128BitVector() && InVT.is128BitVector() && "Unexpected VTs"); in LowerEXTEND_VECTOR_INREG()
46971 if (VT.is128BitVector()) { in combineVectorPack()
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H A DX86ISelDAGToDAG.cpp593 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in isLegalMaskCompare()
4262 if (NVT.is128BitVector()) in matchVPTERNLOG()
4272 if (NVT.is128BitVector()) in matchVPTERNLOG()
4292 if (NVT.is128BitVector()) in matchVPTERNLOG()
4627 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM()
4628 unsigned SubReg = CmpVT.is128BitVector() ? X86::sub_xmm : X86::sub_ymm; in tryVPTESTM()
4952 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || in Select()
H A DX86TargetTransformInfo.cpp2646 !((ST->hasXOP() && (!ST->hasAVX2() || MTy.is128BitVector())) || in getCmpSelInstrCost()
3411 if (!(MTy.is128BitVector() || (ST->hasAVX2() && MTy.is256BitVector()) || in getTypeBasedIntrinsicInstrCost()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp877 assert(Node->getValueType(0).is128BitVector()); in trySelect()
1097 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
H A DMipsSEISelLowering.cpp598 if (!Ty.is128BitVector()) in performORCombine()
995 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2408 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2460 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2980 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2303 assert(VecType.is128BitVector() && "Unexpected shuffle vector type"); in LowerVECTOR_SHUFFLE()
2451 if (!SrcType.is128BitVector() || in performVECTOR_SHUFFLECombine()
2689 if (SrcVT.is256BitVector() && DstVT.is128BitVector()) { in truncateVectorWithNARROW()
2723 (OutSVT == MVT::i8 || OutSVT == MVT::i16) && OutVT.is128BitVector())) in performTruncateCombine()
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DMachineValueType.h415 bool is128BitVector() const { in is128BitVector() function
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp6260 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
6898 bool is128Bits = VectorVT.is128BitVector(); in isVMOVModifiedImm()
8007 if (ST->hasNEON() && VT.is128BitVector() && VT != MVT::v2f64 && VT != MVT::v4f32) { in LowerBUILD_VECTOR()
8301 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
9073 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
9355 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()
9471 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
12451 !N0.getValueType().is128BitVector()) in AddCombineVUZPToVPADDL()
13995 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
14539 EVT CanonicalVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in PerformORCombine()
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