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/llvm-project-15.0.7/lldb/unittests/Interpreter/
H A DTestCommandPaths.cpp89 void RunTest(CommandInterpreter &interp, const char *args, bool is_leaf, in RunTest() argument
95 interp.VerifyUserMultiwordCmdPath(test_args, is_leaf, error); in RunTest()
115 CommandInterpreter &interp = debugger_sp->GetCommandInterpreter(); in TEST_F() local
124 RunTest(interp, "process launch", is_leaf, success, in TEST_F()
130 RunTest(interp, "wewouldnevernameacommandthis subcommand", is_leaf, success, in TEST_F()
134 error = interp.AddUserCommand( in TEST_F()
141 RunTest(interp, "dummy subcommand", is_leaf, success, "dummy subcommand"); in TEST_F()
144 RunTest(interp, "dummy subcommand", is_leaf, success, "dummy"); in TEST_F()
150 RunTest(interp, "dummy subcommand leaf", is_leaf, success, in TEST_F()
156 RunTest(interp, "dummy subcommand leaf", is_leaf, success, in TEST_F()
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/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dllvm.amdgcn.interp.ll17 %p0_0 = call float @llvm.amdgcn.interp.p1(float %i, i32 0, i32 0, i32 %arg3)
19 %p0_1 = call float @llvm.amdgcn.interp.p1(float %i, i32 1, i32 0, i32 %arg3)
21 %const = call float @llvm.amdgcn.interp.mov(i32 2, i32 0, i32 0, i32 %arg3)
44 %p0_0 = call float @llvm.amdgcn.interp.p1(float %i, i32 0, i32 0, i32 256)
45 %p0_1 = call float @llvm.amdgcn.interp.p1(float %i, i32 1, i32 0, i32 256)
46 %p0_2 = call float @llvm.amdgcn.interp.p1(float %i, i32 2, i32 0, i32 256)
47 %p0_3 = call float @llvm.amdgcn.interp.p1(float %i, i32 3, i32 0, i32 256)
176 ; %tmp1 = call float @llvm.amdgcn.interp.mov(i32 2, i32 0, i32 0, i32 0)
218 declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #1
219 declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #1
[all …]
H A Dllvm.amdgcn.interp.inreg.ll26 %p0_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p0, float %i, float %p0)
27 %p1_0 = call float @llvm.amdgcn.interp.inreg.p2(float %p0, float %j, float %p0_0)
28 %p0_1 = call float @llvm.amdgcn.interp.inreg.p10(float %p1, float %i, float %p1)
29 %p1_1 = call float @llvm.amdgcn.interp.inreg.p2(float %p1, float %j, float %p1_0)
64 %p0_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p0, float %i, float %p0)
66 %p1_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p1, float %i, float %p1)
68 %p2_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p2, float %i, float %p2)
151 declare float @llvm.amdgcn.interp.inreg.p10(float, float, float) #0
152 declare float @llvm.amdgcn.interp.inreg.p2(float, float, float) #0
153 declare float @llvm.amdgcn.interp.inreg.p10.f16(float, float, float, i1) #0
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H A Dllvm.amdgcn.interp.f16.ll50 %p1_0 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
52 %p1_1 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 1, i32 %m0)
58 ; check that m0 is setup correctly before the interp p1 instruction
110 %p1_0 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
118 ; check that m0 is setup correctly before the interp p2 instruction
172 %p1_0 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
181 ; float @llvm.amdgcn.interp.p1.f16(i, attrchan, attr, high, m0)
182 declare float @llvm.amdgcn.interp.p1.f16(float, i32, i32, i1, i32) #0
183 ; half @llvm.amdgcn.interp.p1.f16(p1, j, attrchan, attr, high, m0)
184 declare half @llvm.amdgcn.interp.p2.f16(float, float, i32, i32, i1, i32) #0
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H A Ddual-source-blend-export.ll53 %i14 = call float @llvm.amdgcn.interp.inreg.p10(float %i8, float %InterpCenter.i0, float %i8)
54 %i15 = call float @llvm.amdgcn.interp.inreg.p2(float %i8, float %InterpCenter.i1, float %i14)
56 %i16 = call float @llvm.amdgcn.interp.inreg.p10(float %i7, float %InterpCenter.i0, float %i7)
57 %i17 = call float @llvm.amdgcn.interp.inreg.p2(float %i7, float %InterpCenter.i1, float %i16)
59 %i18 = call float @llvm.amdgcn.interp.inreg.p10(float %i6, float %InterpCenter.i0, float %i6)
60 %i19 = call float @llvm.amdgcn.interp.inreg.p2(float %i6, float %InterpCenter.i1, float %i18)
62 %i20 = call float @llvm.amdgcn.interp.inreg.p10(float %i9, float %InterpCenter.i0, float %i9)
63 %i21 = call float @llvm.amdgcn.interp.inreg.p2(float %i9, float %InterpCenter.i1, float %i20)
96 declare float @llvm.amdgcn.interp.inreg.p10(float, float, float) #1
97 declare float @llvm.amdgcn.interp.inreg.p2(float, float, float) #1
H A Damdpal-msgpack-psenable.ll15 %inst25 = tail call float @llvm.amdgcn.interp.p1(float %inst23, i32 0, i32 0, i32 %m0)
16 …%inst26 = tail call float @llvm.amdgcn.interp.p2(float %inst25, float %inst24, i32 0, i32 0, i32 %…
20 declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #2
21 declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #2
H A Damdpal-psenable.ll26 %inst25 = tail call float @llvm.amdgcn.interp.p1(float %inst23, i32 0, i32 0, i32 %m0)
27 …%inst26 = tail call float @llvm.amdgcn.interp.p2(float %inst25, float %inst24, i32 0, i32 0, i32 %…
31 declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #2
32 declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #2
/llvm-project-15.0.7/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/
H A Dinterp_f16.ll4 ; CHECK: DIVERGENT: %p1 = call float @llvm.amdgcn.interp.p1.f16
7 %p1 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
12 ; CHECK: DIVERGENT: %p2 = call half @llvm.amdgcn.interp.p2.f16
15 %p2 = call half @llvm.amdgcn.interp.p2.f16(float %i, float %j, i32 1, i32 2, i1 0, i32 %m0)
19 ; float @llvm.amdgcn.interp.p1.f16(i, attrchan, attr, high, m0)
20 declare float @llvm.amdgcn.interp.p1.f16(float, i32, i32, i1, i32) #0
21 ; half @llvm.amdgcn.interp.p1.f16(p1, j, attrchan, attr, high, m0)
22 declare half @llvm.amdgcn.interp.p2.f16(float, float, i32, i32, i1, i32) #0
23 declare float @llvm.amdgcn.interp.mov(i32, i32, i32, i32) #0
/llvm-project-15.0.7/lldb/test/API/functionalities/history/
H A DTestHistoryRecall.py28 interp = self.dbg.GetCommandInterpreter()
32 interp.HandleCommand("session history", result, True)
40 interp = self.dbg.GetCommandInterpreter()
42 interp.HandleCommand("session history", result, True)
43 interp.HandleCommand("platform list", result, True)
45 interp.HandleCommand("!0", result, False)
49 interp.HandleCommand("!-1", result, False)
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.interp.inreg.ll26 %p0_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p0, float %i, float %p0)
27 %p1_0 = call float @llvm.amdgcn.interp.inreg.p2(float %p0, float %j, float %p0_0)
28 %p0_1 = call float @llvm.amdgcn.interp.inreg.p10(float %p1, float %i, float %p1)
29 %p1_1 = call float @llvm.amdgcn.interp.inreg.p2(float %p1, float %j, float %p1_0)
64 %p0_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p0, float %i, float %p0)
66 %p1_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p1, float %i, float %p1)
68 %p2_0 = call float @llvm.amdgcn.interp.inreg.p10(float %p2, float %i, float %p2)
151 declare float @llvm.amdgcn.interp.inreg.p10(float, float, float) #0
152 declare float @llvm.amdgcn.interp.inreg.p2(float, float, float) #0
153 declare float @llvm.amdgcn.interp.inreg.p10.f16(float, float, float, i1) #0
[all …]
H A Dregbankselect-amdgcn.interp.p1.mir19 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), [[COPY2]]…
22 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), %0, 1, 1, %1
38 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), [[COPY]](…
41 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), %0, 1, 1, %1
59 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), [[COPY2]]…
62 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), %0, 1, 1, %1
79 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), [[COPY]](…
82 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1), %0, 1, 1, %1
H A Dregbankselect-amdgcn.interp.mov.mir19 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.mov), [[COPY2]…
22 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.mov), %0, 1, 1, %1
38 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.mov), 0, 1, 1,…
40 %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.mov), 0, 1, 1, %0
H A Dregbankselect-amdgcn.interp.p1.f16.mir20 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1.f16), [[COP…
23 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1.f16), %0, 1, 1, 1, %1
41 …; CHECK-NEXT: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1.f16), [[COP…
44 %2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.interp.p1.f16), %0, 1, 1, 1, %1
/llvm-project-15.0.7/lldb/test/API/functionalities/memory-region/
H A DTestMemoryRegion.py43 interp = self.dbg.GetCommandInterpreter()
47 interp.HandleCommand("memory region", result)
54 interp.HandleCommand("memory region --all 0", result)
60 interp.HandleCommand("memory region not_an_address", result)
69 interp.HandleCommand("memory region 0x0", result)
76 interp.HandleCommand("memory region", result)
82 interp.HandleCommand("memory region", result)
87 interp.HandleCommand("memory region --all", result)
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Dbuiltins-amdgcn-interp.cl7 // CHECK: call float @llvm.amdgcn.interp.p1.f16
8 // CHECK: call half @llvm.amdgcn.interp.p2.f16
9 // CHECK: call float @llvm.amdgcn.interp.p1.f16
10 // CHECK: call half @llvm.amdgcn.interp.p2.f16
21 // CHECK: call float @llvm.amdgcn.interp.p1
22 // CHECK: call float @llvm.amdgcn.interp.p2
30 // CHECK: call float @llvm.amdgcn.interp.mov
/llvm-project-15.0.7/lldb/source/Breakpoint/
H A DBreakpointResolverScripted.cpp111 ScriptInterpreter *interp = GetScriptInterpreter(); in SearchCallback() local
112 should_continue = interp->ScriptedBreakpointResolverSearchCallback( in SearchCallback()
125 ScriptInterpreter *interp = GetScriptInterpreter(); in GetDepth() local
126 depth = interp->ScriptedBreakpointResolverSearchDepth( in GetDepth()
137 ScriptInterpreter *interp = GetScriptInterpreter(); in GetDescription() local
138 interp->GetShortHelpForCommandObject(m_implementation_sp, in GetDescription()
/llvm-project-15.0.7/lldb/test/API/commands/target/stop-hooks/
H A DTestStopHookScripted.py33 self.interp.HandleCommand(command, result)
40 self.interp.HandleCommand(command, result)
85 self.interp.HandleCommand(command, result)
108 self.interp = self.dbg.GetCommandInterpreter()
114 self.interp.HandleCommand(command, result)
133 self.interp.HandleCommand(command, result)
H A DTestStopHooks.py39 interp = self.dbg.GetCommandInterpreter()
41 interp.HandleCommand("target stop-hook add -o 'expr g_var++'", result)
49 interp = self.dbg.GetCommandInterpreter()
51 interp.HandleCommand("target stop-hook add -o 'expr g_var++'", result)
/llvm-project-15.0.7/lldb/test/API/commands/thread/backtrace/
H A DTestThreadBacktraceRepeat.py50 interp = self.dbg.GetCommandInterpreter()
55 interp.HandleCommand("thread backtrace --count 10 {0}".format(thread_id), result, True)
69 interp.HandleCommand("", result, True)
137 interp = self.dbg.GetCommandInterpreter()
140 …interp.HandleCommand("thread backtrace --count 10 --start 10 {0} {1}".format(thread_id_1, thread_i…
144 interp.HandleCommand("", result, True)
151 interp.HandleCommand("", result, True)
/llvm-project-15.0.7/lldb/test/API/functionalities/plugins/python_os_plugin/stepping_plugin_threads/
H A DTestOSPluginStepping.py86 interp = self.dbg.GetCommandInterpreter()
87 interp.HandleCommand(command, result)
92 interp.HandleCommand(command, result)
97 interp.HandleCommand("thread plan prune 0x111111111", result)
102 interp.HandleCommand(command, result)
/llvm-project-15.0.7/lldb/test/Shell/ObjectFile/ELF/
H A DPT_LOAD-overlap-PT_INTERP.yaml25 - Name: .interp
42 FirstSec: .interp
43 LastSec: .interp
48 FirstSec: .interp
/llvm-project-15.0.7/lldb/test/API/commands/expression/timeout/
H A DTestCallWithTimeout.py47 interp = self.dbg.GetCommandInterpreter()
50 return_value = interp.HandleCommand(
63 interp = self.dbg.GetCommandInterpreter()
66 return_value = interp.HandleCommand(
/llvm-project-15.0.7/bolt/test/AArch64/Inputs/
H A Dskip-got-rel.yaml15 FirstSec: .interp
16 LastSec: .interp
20 FirstSec: .interp
50 - Name: .interp
145 - Name: .interp
147 Section: .interp
/llvm-project-15.0.7/lldb/test/API/commands/frame/var/
H A DTestFrameVar.py55 interp = self.dbg.GetCommandInterpreter()
58 result = interp.HandleCommand("frame var -l", command_result)
67 result = interp.HandleCommand("frame var -a", command_result)
76 result = interp.HandleCommand("frame var -l -a -g", command_result)
/llvm-project-15.0.7/lldb/examples/python/
H A Ddisassembly_mode.py7 self.interp = debugger.GetCommandInterpreter()
19 self.interp.HandleCommand("settings show " + setting, result)
25 self.interp.HandleCommand("settings set " + setting + " " + value, result)

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