Lines Matching refs:interp
50 %p1_0 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
51 %p2_0 = call half @llvm.amdgcn.interp.p2.f16(float %p1_0, float %j, i32 1, i32 2, i1 0, i32 %m0)
52 %p1_1 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 1, i32 %m0)
53 %p2_1 = call half @llvm.amdgcn.interp.p2.f16(float %p1_1, float %j, i32 1, i32 2, i1 1, i32 %m0)
58 ; check that m0 is setup correctly before the interp p1 instruction
110 %p1_0 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
111 %p2_0 = call half @llvm.amdgcn.interp.p2.f16(float %p1_0, float %j, i32 1, i32 2, i1 0, i32 %m0)
118 ; check that m0 is setup correctly before the interp p2 instruction
172 %p1_0 = call float @llvm.amdgcn.interp.p1.f16(float %i, i32 1, i32 2, i1 0, i32 %m0)
174 %p2_0 = call half @llvm.amdgcn.interp.p2.f16(float %p1_0, float %j, i32 1, i32 2, i1 0, i32 %m0)
181 ; float @llvm.amdgcn.interp.p1.f16(i, attrchan, attr, high, m0)
182 declare float @llvm.amdgcn.interp.p1.f16(float, i32, i32, i1, i32) #0
183 ; half @llvm.amdgcn.interp.p1.f16(p1, j, attrchan, attr, high, m0)
184 declare half @llvm.amdgcn.interp.p2.f16(float, float, i32, i32, i1, i32) #0
185 declare float @llvm.amdgcn.interp.mov(i32, i32, i32, i32) #0