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Searched refs:hasOptionalDef (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp657 if (MCID.hasOptionalDef() && in ReduceSpecial()
817 if (MCID.hasOptionalDef()) { in ReduceTo2Addr()
828 if (Entry.PartFlag && NewMCID.hasOptionalDef() && HasCC && in ReduceTo2Addr()
836 if (NewMCID.hasOptionalDef()) in ReduceTo2Addr()
909 if (MCID.hasOptionalDef()) { in ReduceToNarrow()
920 if (Entry.PartFlag && NewMCID.hasOptionalDef() && HasCC && in ReduceToNarrow()
937 if (NewMCID.hasOptionalDef()) in ReduceToNarrow()
942 if (NewMCID.hasOptionalDef()) in ReduceToNarrow()
H A DThumb2ITBlockPass.cpp172 if (MI->hasOptionalDef() && in MoveCopyOutOfITBlock()
H A DARMBaseInstrInfo.cpp2393 if (NewMI->hasOptionalDef()) in optimizeSelect()
3317 if (DefMCID.hasOptionalDef()) { in FoldImmediate()
3327 if (UseMCID.hasOptionalDef()) { in FoldImmediate()
H A DARMFastISel.cpp246 if (!MI->hasOptionalDef()) in DefinesOptionalPredicate()
H A DARMISelLowering.cpp12218 if (!MI.hasOptionalDef() || !MCID->OpInfo[ccOutIdx].isOptionalDef()) { in AdjustInstrPostInstrSelection()
/llvm-project-15.0.7/llvm/lib/MCA/
H A DInstrBuilder.cpp280 if (MCDesc.hasOptionalDef()) { in verifyOperands()
347 if (MCDesc.hasOptionalDef()) in populateWrites()
421 if (MCDesc.hasOptionalDef()) { in populateWrites()
439 CurrentDef = NumExplicitDefs + NumImplicitDefs + MCDesc.hasOptionalDef(); in populateWrites()
469 if (MCDesc.hasOptionalDef()) in populateReads()
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrDesc.h262 bool hasOptionalDef() const { return Flags & (1ULL << MCID::HasOptionalDef); } in hasOptionalDef() function
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DCodeGenInstruction.h154 bool hasOptionalDef; variable
H A DCodeGenInstruction.cpp28 hasOptionalDef = false; in CGIOperandList()
110 hasOptionalDef = true; in CGIOperandList()
H A DInstrInfoEmitter.cpp1153 if (Inst.Operands.hasOptionalDef) OS << "|(1ULL<<MCID::HasOptionalDef)"; in emitRecord()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineInstr.h801 bool hasOptionalDef(QueryType Type = IgnoreBundle) const {
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp1126 if (!UsedRegs.empty() || II.getImplicitDefs() || II.hasOptionalDef()) in EmitMachineNode()
H A DScheduleDAGRRList.cpp1426 if (MCID.hasOptionalDef()) { in DelayForLiveRegsBottomUp()
/llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp10731 assert(MCID.hasOptionalDef() && in checkTargetMatchPredicate()