| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPeephole.cpp | 87 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg()); in isCVTAToLocalCombinationCandidate() 114 auto &Prev = *MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in CombineCVTAToLocal() 159 if (auto MI = MRI.getUniqueVRegDef(NRI->getFrameRegister(MF))) { in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 114 if (!MRI->getUniqueVRegDef(MO.getReg())) in checkADDrr() 183 if (!MRI->getUniqueVRegDef(I->getReg())) in processCandidate() 214 if (IsAma && MRI->getUniqueVRegDef(I->getReg())) in processDstReg() 287 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD()
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVDuplicatesTracker.cpp | 25 MachineInstr *MI = MF->getRegInfo().getUniqueVRegDef(R); in prebuildReg2Entry() 48 MachineInstr *MI = MRI.getUniqueVRegDef(U.second); in buildDepsGraph()
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| H A D | SPIRVModuleAnalysis.cpp | 115 MachineInstr *MI = MF->getRegInfo().getUniqueVRegDef(Reg); in collectDefInstr() 152 if (!MF->getRegInfo().getUniqueVRegDef(Reg)) in collectGlobalEntities() 157 MAI.GlobalVarList.push_back(MF->getRegInfo().getUniqueVRegDef(Reg)); in collectGlobalEntities()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64MIPeepholeOpt.cpp | 203 MachineInstr *SrcMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in visitORR() 333 MachineInstr &SrcMI = *MRI->getUniqueVRegDef(MI.getOperand(1).getReg()); in visitADDSSUBS() 367 MovMI = MRI->getUniqueVRegDef(MI.getOperand(2).getReg()); in checkMovImmInstr() 375 MovMI = MRI->getUniqueVRegDef(MovMI->getOperand(2).getReg()); in checkMovImmInstr()
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| H A D | AArch64CondBrTuning.cpp | 83 return MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| H A D | AArch64InstrInfo.cpp | 1295 auto *Mask = MRI->getUniqueVRegDef(MaskReg); in optimizePTestInstr() 1296 auto *Pred = MRI->getUniqueVRegDef(PredReg); in optimizePTestInstr() 1340 auto *PredMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in optimizePTestInstr() 1351 auto *PredMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in optimizePTestInstr() 1363 auto *PredMask = MRI->getUniqueVRegDef(Pred->getOperand(1).getReg()); in optimizePTestInstr() 1686 MachineInstr *MI = MRI.getUniqueVRegDef(SrcReg); in substituteCmpToZero() 1810 MachineInstr *MI = MRI.getUniqueVRegDef(SrcReg); in removeCmpToZeroOrOne() 4852 MI = MRI.getUniqueVRegDef(MO.getReg()); in canCombine() 5214 MI = MRI.getUniqueVRegDef(MO.getReg()); in getFMULPatterns() 5218 MI = MRI.getUniqueVRegDef(MI->getOperand(1).getReg()); in getFMULPatterns() [all …]
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| H A D | AArch64SIMDInstrOpt.cpp | 522 DefiningMI = MRI->getUniqueVRegDef(SeqReg); in optimizeLdStInterleave()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MachineSSAContext.cpp | 48 if (auto *Instr = MRI->getUniqueVRegDef(Value)) { in print()
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| H A D | TargetInstrInfo.cpp | 709 MI1 = MRI.getUniqueVRegDef(Op1.getReg()); in hasReassociableOperands() 711 MI2 = MRI.getUniqueVRegDef(Op2.getReg()); in hasReassociableOperands() 721 MachineInstr *MI1 = MRI.getUniqueVRegDef(Inst.getOperand(1).getReg()); in hasReassociableSibling() 722 MachineInstr *MI2 = MRI.getUniqueVRegDef(Inst.getOperand(2).getReg()); in hasReassociableSibling() 903 Prev = MRI.getUniqueVRegDef(Root.getOperand(1).getReg()); in genAlternativeCodeSequence() 907 Prev = MRI.getUniqueVRegDef(Root.getOperand(2).getReg()); in genAlternativeCodeSequence()
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| H A D | ModuloSchedule.cpp | 1346 MachineInstr *Producer = MRI.getUniqueVRegDef(Reg); in remapUse() 1376 LoopProducer = MRI.getUniqueVRegDef(LoopReg); in remapUse() 1694 MachineInstr *Use = MRI.getUniqueVRegDef(MO.getReg()); in moveStageBetweenBlocks() 1796 MachineInstr *Use = MRI.getUniqueVRegDef(Reg); in peelPrologAndEpilogs() 1885 MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in getEquivalentRegisterIn() 1896 int RMIStage = getStage(MRI.getUniqueVRegDef(R)); in rewriteUsesOf()
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| H A D | EarlyIfConversion.cpp | 568 const MachineInstr *TDef = MRI.getUniqueVRegDef(TReg); in hasSameValue() 569 const MachineInstr *FDef = MRI.getUniqueVRegDef(FReg); in hasSameValue()
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| H A D | MachineRegisterInfo.cpp | 407 MachineInstr *MachineRegisterInfo::getUniqueVRegDef(Register Reg) const { in getUniqueVRegDef() function in MachineRegisterInfo
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| H A D | TargetRegisterInfo.cpp | 73 MachineInstr *MI = MRI.getUniqueVRegDef(VirtReg.reg()); in shouldRegionSplitForVirtReg()
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| H A D | MachineCombiner.cpp | 155 DefInstr = MRI->getUniqueVRegDef(MO.getReg()); in getOperandDef()
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| H A D | MachineCSE.cpp | 665 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlockCSE()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86DynAllocaExpander.cpp | 86 MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg); in getDynAllocaAmount() 276 if (MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg)) in lower()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 382 if (MachineInstr *Def = MRI->getUniqueVRegDef(MI.getOperand(1).getReg())) { in emitIfBreak() 565 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in findMaskOperands() 607 MRI->getUniqueVRegDef(Reg)->eraseFromParent(); in combineMasks() 628 const MachineInstr *Def = MRI->getUniqueVRegDef(SavedExec); in optimizeEndCf()
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| H A D | SILowerI1Copies.cpp | 581 MachineInstr *IncomingDef = MRI->getUniqueVRegDef(IncomingReg); in lowerPhis() 752 MI = MRI->getUniqueVRegDef(Reg); in isConstantLaneMask()
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| H A D | GCNNSAReassign.cpp | 212 const MachineInstr *Def = MRI->getUniqueVRegDef(Reg); in CheckNSA()
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| H A D | R600OptimizeVectorRegisters.cpp | 43 const MachineInstr *MI = MRI.getUniqueVRegDef(Reg); in isImplicitlyDef()
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| H A D | SILoadStoreOptimizer.cpp | 1900 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in extractConstOffset() 1923 MachineInstr *Def = MRI->getUniqueVRegDef(Base.getReg()); in processBaseWithConstOffset() 1933 MachineInstr *BaseLoDef = MRI->getUniqueVRegDef(BaseLo.getReg()); in processBaseWithConstOffset() 1934 MachineInstr *BaseHiDef = MRI->getUniqueVRegDef(BaseHi.getReg()); in processBaseWithConstOffset()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegisterInfo.cpp | 96 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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| H A D | WebAssemblyMachineFunctionInfo.h | 130 assert(MRI.getUniqueVRegDef(VReg)); in stackifyVReg()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 288 MachineInstr *MI = MRI->getUniqueVRegDef(SrcReg); in optimizeCompareInstr()
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