11d0244aeSSameer Sahasrabuddhe //===- MachineSSAContext.cpp ------------------------------------*- C++ -*-===//
21d0244aeSSameer Sahasrabuddhe //
31d0244aeSSameer Sahasrabuddhe // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
41d0244aeSSameer Sahasrabuddhe // See https://llvm.org/LICENSE.txt for license information.
51d0244aeSSameer Sahasrabuddhe // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
61d0244aeSSameer Sahasrabuddhe //
71d0244aeSSameer Sahasrabuddhe //===----------------------------------------------------------------------===//
81d0244aeSSameer Sahasrabuddhe /// \file
91d0244aeSSameer Sahasrabuddhe ///
101d0244aeSSameer Sahasrabuddhe /// This file defines a specialization of the GenericSSAContext<X>
111d0244aeSSameer Sahasrabuddhe /// template class for Machine IR.
121d0244aeSSameer Sahasrabuddhe ///
131d0244aeSSameer Sahasrabuddhe //===----------------------------------------------------------------------===//
141d0244aeSSameer Sahasrabuddhe 
151d0244aeSSameer Sahasrabuddhe #include "llvm/CodeGen/MachineSSAContext.h"
161d0244aeSSameer Sahasrabuddhe #include "llvm/CodeGen/MachineBasicBlock.h"
17*989f1c72Sserge-sans-paille #include "llvm/CodeGen/MachineFunction.h"
181d0244aeSSameer Sahasrabuddhe #include "llvm/CodeGen/MachineInstr.h"
19*989f1c72Sserge-sans-paille #include "llvm/CodeGen/MachineRegisterInfo.h"
201d0244aeSSameer Sahasrabuddhe #include "llvm/Support/raw_ostream.h"
211d0244aeSSameer Sahasrabuddhe 
221d0244aeSSameer Sahasrabuddhe using namespace llvm;
231d0244aeSSameer Sahasrabuddhe 
getEntryBlock(MachineFunction & F)241d0244aeSSameer Sahasrabuddhe MachineBasicBlock *MachineSSAContext::getEntryBlock(MachineFunction &F) {
251d0244aeSSameer Sahasrabuddhe   return &F.front();
261d0244aeSSameer Sahasrabuddhe }
271d0244aeSSameer Sahasrabuddhe 
setFunction(MachineFunction & Fn)281d0244aeSSameer Sahasrabuddhe void MachineSSAContext::setFunction(MachineFunction &Fn) {
291d0244aeSSameer Sahasrabuddhe   MF = &Fn;
301d0244aeSSameer Sahasrabuddhe   RegInfo = &MF->getRegInfo();
311d0244aeSSameer Sahasrabuddhe }
321d0244aeSSameer Sahasrabuddhe 
print(MachineBasicBlock * Block) const331d0244aeSSameer Sahasrabuddhe Printable MachineSSAContext::print(MachineBasicBlock *Block) const {
341d0244aeSSameer Sahasrabuddhe   return Printable([Block](raw_ostream &Out) { Block->printName(Out); });
351d0244aeSSameer Sahasrabuddhe }
361d0244aeSSameer Sahasrabuddhe 
print(MachineInstr * I) const371d0244aeSSameer Sahasrabuddhe Printable MachineSSAContext::print(MachineInstr *I) const {
381d0244aeSSameer Sahasrabuddhe   return Printable([I](raw_ostream &Out) { I->print(Out); });
391d0244aeSSameer Sahasrabuddhe }
401d0244aeSSameer Sahasrabuddhe 
print(Register Value) const411d0244aeSSameer Sahasrabuddhe Printable MachineSSAContext::print(Register Value) const {
421d0244aeSSameer Sahasrabuddhe   auto *MRI = RegInfo;
431d0244aeSSameer Sahasrabuddhe   return Printable([MRI, Value](raw_ostream &Out) {
441d0244aeSSameer Sahasrabuddhe     Out << printReg(Value, MRI->getTargetRegisterInfo(), 0, MRI);
451d0244aeSSameer Sahasrabuddhe 
461d0244aeSSameer Sahasrabuddhe     if (Value) {
471d0244aeSSameer Sahasrabuddhe       // Try to print the definition.
481d0244aeSSameer Sahasrabuddhe       if (auto *Instr = MRI->getUniqueVRegDef(Value)) {
491d0244aeSSameer Sahasrabuddhe         Out << ": ";
501d0244aeSSameer Sahasrabuddhe         Instr->print(Out);
511d0244aeSSameer Sahasrabuddhe       }
521d0244aeSSameer Sahasrabuddhe     }
531d0244aeSSameer Sahasrabuddhe   });
541d0244aeSSameer Sahasrabuddhe }
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