Searched refs:getRegClassForReg (Results 1 – 7 of 7) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixSGPRCopies.cpp | 855 TRI->getRegClassForReg(*MRI, SrcReg); in processPHINode()
1035 const TargetRegisterClass *DstRC = TRI->getRegClassForReg(*MRI, DstReg); in lowerVGPR2SGPRCopies()
1135 const TargetRegisterClass *SrcRC = TRI->getRegClassForReg(*MRI, SrcReg); in lowerVGPR2SGPRCopies()
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| H A D | SIRegisterInfo.h | 284 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
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| H A D | SILoadStoreOptimizer.cpp | 998 return TRI->getRegClassForReg(*MRI, Dst->getReg()); in getDataRegClass()
1001 return TRI->getRegClassForReg(*MRI, Src->getReg()); in getDataRegClass()
1004 return TRI->getRegClassForReg(*MRI, Src->getReg()); in getDataRegClass()
1007 return TRI->getRegClassForReg(*MRI, Dst->getReg()); in getDataRegClass()
1010 return TRI->getRegClassForReg(*MRI, Src->getReg()); in getDataRegClass()
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| H A D | SIRegisterInfo.cpp | 1290 const TargetRegisterClass *RC = getRegClassForReg(MF->getRegInfo(), ValueReg); in buildSpillLoadStore()
2812 SIRegisterInfo::getRegClassForReg(const MachineRegisterInfo &MRI, in getRegClassForReg() function in SIRegisterInfo
2819 const TargetRegisterClass *RC = getRegClassForReg(MRI, Reg); in isVGPR()
2826 const TargetRegisterClass *RC = getRegClassForReg(MRI, Reg); in isAGPR()
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| H A D | SIFoldOperands.cpp | 684 const TargetRegisterClass *DestRC = TRI->getRegClassForReg(*MRI, DestReg); in foldOperand()
894 TRI->getRegClassForReg(*MRI, OpToFold.getReg()); in foldOperand()
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| H A D | SIInstrInfo.cpp | 4104 const TargetRegisterClass *RC = RI.getRegClassForReg(MRI, Reg); in verifyInstruction()
4148 if (!MO.isReg() || !RI.hasVGPRs(RI.getRegClassForReg(MRI, MO.getReg()))) { in verifyInstruction()
5243 if (RI.hasAGPRs(RI.getRegClassForReg(MRI, MO.getReg())) && in legalizeOperandsVOP3()
5249 if (!RI.isSGPRClass(RI.getRegClassForReg(MRI, MO.getReg()))) in legalizeOperandsVOP3()
5438 RI.getRegClassForReg(MRI, OpReg), OpSubReg); in legalizeGenericOperand()
6407 NewDstRC == RI.getRegClassForReg(MRI, Inst.getOperand(1).getReg())) { in moveToVALU()
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| H A D | SIISelLowering.cpp | 11972 auto *RC = TRI->getRegClassForReg(MRI, Op.getReg()); in AdjustInstrPostInstrSelection()
11989 auto *RC = TRI->getRegClassForReg(MRI, Src2->getReg()); in AdjustInstrPostInstrSelection()
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