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Searched refs:getOpcodeDef (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp66 auto *FAddMI = getOpcodeDef(TargetOpcode::G_FADD, Src1, MRI); in matchExtractVecEltPairwiseAdd()
78 getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op2, MRI); in matchExtractVecEltPairwiseAdd()
81 Shuffle = getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op1, MRI); in matchExtractVecEltPairwiseAdd()
H A DAArch64PostLegalizerLowering.cpp321 auto *InsMI = getOpcodeDef(TargetOpcode::G_INSERT_VECTOR_ELT, in matchDupFromInsertVectorElt()
326 if (!getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, InsMI->getOperand(1).getReg(), in matchDupFromInsertVectorElt()
346 auto *BuildVecMI = getOpcodeDef(TargetOpcode::G_BUILD_VECTOR, in matchDupFromBuildVector()
H A DAArch64InstructionSelector.cpp1626 MachineInstr *AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
1661 AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
2242 return getOpcodeDef(TargetOpcode::G_ICMP, Reg, MRI); in earlySelect()
2249 auto *Cmp = getOpcodeDef(TargetOpcode::G_ICMP, ZExt, MRI); in earlySelect()
3221 auto *LoadMI = getOpcodeDef(TargetOpcode::G_LOAD, SrcReg, MRI); in select()
5251 MachineInstr *Extract = getOpcodeDef(TargetOpcode::G_EXTRACT_VECTOR_ELT, in selectUSMovFromExtend()
5432 else if ((OpMI = getOpcodeDef(TargetOpcode::G_FCONSTANT, in tryOptConstantBuildVec()
5463 return !getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, Op.getReg(), in tryOptBuildVecToSubregToReg()
6171 getOpcodeDef(TargetOpcode::G_PTR_ADD, Root.getReg(), MRI); in selectAddrModeShiftedExtendXReg()
6232 getOpcodeDef(TargetOpcode::G_PTR_ADD, Root.getReg(), MRI); in selectAddrModeXRO()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h214 MachineInstr *getOpcodeDef(unsigned Opcode, Register Reg,
251 T *getOpcodeDef(Register Reg, const MachineRegisterInfo &MRI) { in getOpcodeDef() function
H A DLegalizationArtifactCombiner.h339 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, in tryFoldImplicitDef()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp473 MachineInstr *llvm::getOpcodeDef(unsigned Opcode, Register Reg, in getOpcodeDef() function in llvm
614 auto *SrcVec2 = getOpcodeDef<GBuildVector>(Op2, MRI); in ConstantFoldVectorBinop()
618 auto *SrcVec1 = getOpcodeDef<GBuildVector>(Op1, MRI); in ConstantFoldVectorBinop()
787 auto *BV = getOpcodeDef<GBuildVector>(Src, MRI); in ConstantFoldCTLZ()
1169 getOpcodeDef<GImplicitDef>(BV->getSourceReg(SrcIdx), MRI)) in isConstantOrConstantVector()
H A DCombinerHelper.cpp797 if (auto *LoadMI = getOpcodeDef<GSExtLoad>(LoadUser, MRI)) { in matchSextTruncSextLoad()
827 auto *LoadDef = getOpcodeDef<GLoad>(SrcReg, MRI); in matchSextInRegOfLoad()
971 MachineInstr *AddrDef = getOpcodeDef(TargetOpcode::G_PTR_ADD, Addr, MRI); in findPreIndexCandidate()
1682 auto *Unmerge = getOpcodeDef<GUnmerge>(MergedValues[0], MRI); in matchCombineMergeUnmerge()
1709 auto *SrcInstr = getOpcodeDef<GMergeLikeOp>(SrcReg, MRI); in matchCombineUnmergeMergeToPlainValues()
2306 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAnyExplicitUseIsUndef()
2313 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAllExplicitUsesAreUndef()
2500 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchOperandIsUndef()
3288 auto *Load = getOpcodeDef<GZExtLoad>(MaybeLoad, MRI); in matchLoadAndBytePosition()
3930 getOpcodeDef(TargetOpcode::G_BUILD_VECTOR, SrcVec, MRI); in matchExtractVecEltBuildVec()
[all …]
H A DLegalizerHelper.cpp7461 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in lowerMemset()
7616 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in lowerMemcpy()
7724 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in lowerMemmove()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2821 if (MachineInstr *SrcFNeg = getOpcodeDef(AMDGPU::G_FNEG, ModSrc, MRI)) { in stripAnySourceMods()
2823 if (MachineInstr *SrcFAbs = getOpcodeDef(AMDGPU::G_FABS, ModSrc, MRI)) in stripAnySourceMods()
2825 } else if (MachineInstr *SrcFAbs = getOpcodeDef(AMDGPU::G_FABS, ModSrc, MRI)) in stripAnySourceMods()
H A DAMDGPUInstructionSelector.cpp2280 MachineInstr *Fabs = getOpcodeDef(TargetOpcode::G_FABS, Src, *MRI); in selectG_FNEG()
4635 = getOpcodeDef(TargetOpcode::G_PTR_ADD, Data.N0, *MRI)) { in parseMUBUFAddress()
H A DAMDGPURegisterBankInfo.cpp1297 MachineInstr *Add = getOpcodeDef(AMDGPU::G_ADD, CombinedOffset, *MRI); in setBufferOffsets()