Searched refs:getIConstantVRegSExtVal (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 173 Optional<int64_t> getIConstantVRegSExtVal(Register VReg,
|
| H A D | MIPatternMatch.h | 75 return getIConstantVRegSExtVal(Reg, MRI); in matchConstant()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 298 llvm::getIConstantVRegSExtVal(Register VReg, const MachineRegisterInfo &MRI) { in getIConstantVRegSExtVal() function in llvm
1095 return getIConstantVRegSExtVal(SplatValAndReg->VReg, MRI); in getIConstantSplatSExtVal()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 484 if (auto COff = getIConstantVRegSExtVal(I.getOperand(2).getReg(), MRI)) { in X86SelectAddress()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3049 Optional<int64_t> MaskVal = getIConstantVRegSExtVal(MaskReg, MRI); in select()
6707 getIConstantVRegSExtVal(MI.getOperand(0).getReg(), MRI); in renderTruncImm()
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBankInfo.cpp | 1255 if (Optional<int64_t> Imm = getIConstantVRegSExtVal(CombinedOffset, *MRI)) { in setBufferOffsets()
|
| H A D | AMDGPUInstructionSelector.cpp | 4876 Optional<int64_t> OffsetVal = getIConstantVRegSExtVal(Reg, MRI); in getConstantZext32Val()
|
| H A D | AMDGPULegalizerInfo.cpp | 3222 auto ConstVal = getIConstantVRegSExtVal(MI.getOperand(2).getReg(), MRI); in isNot()
|