| /llvm-project-15.0.7/llvm/unittests/ADT/ |
| H A D | APIntTest.cpp | 1886 APInt X = APInt::getBitsSet(N, I, I + 8); in TEST()
1887 APInt Y = APInt::getBitsSet(N, N - I - 8, N - I); in TEST()
2132 TEST(APIntTest, getBitsSet) { in TEST() argument
2133 APInt i64hi1lo1 = APInt::getBitsSet(64, 1, 63); in TEST()
2141 APInt i127hi1lo1 = APInt::getBitsSet(127, 1, 126); in TEST()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | RegisterBankInfo.cpp | 564 APInt PartMapMask = APInt::getBitsSet(OrigValueBitWidth, PartMap.StartIdx, in verify()
|
| /llvm-project-15.0.7/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 241 static APInt getBitsSet(unsigned numBits, unsigned loBit, unsigned hiBit) { in getBitsSet() function
|
| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | DeadStoreElimination.cpp | 663 APInt Mask = APInt::getBitsSet(DeadValue.getBitWidth(), LShiftAmount, in tryToMergePartialOverlappingStores()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstCombineIntrinsic.cpp | 236 APInt DemandedUpper = APInt::getBitsSet(NumAmtElts, 1, NumAmtElts / 2); in simplifyX86immShift()
|
| H A D | X86TargetTransformInfo.cpp | 3839 APInt Mask = WidenedDemandedElts.getBitsSet(NumElts, I, I + Scale); in getScalarizationOverhead()
4169 APInt::getBitsSet(CoalescedVecTy->getNumElements(), in getMemoryOpCost()
|
| H A D | X86ISelLowering.cpp | 6850 APInt Mask0 = APInt::getBitsSet(NumElems, IdxVal, IdxVal + SubVecNumElems); in insert1BitVector()
42014 APInt DemandedMask = APInt::getBitsSet(BitWidth, Shift, Shift + Length); in SimplifyDemandedBitsForTargetNode()
44139 APInt Bit = APInt::getBitsSet(EltSizeInBits, BitIdx, BitIdx + 1); in combineToExtendBoolVectorInReg()
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 4116 APInt Demanded = APInt::getBitsSet(32, in PerformDAGCombine()
|
| H A D | SIISelLowering.cpp | 11399 APInt DemandedBits = APInt::getBitsSet(32, 8 * Offset, 8 * Offset + 8); in performCvtF32UByteNCombine()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2738 APInt::getBitsSet(Known.getBitWidth(), DstLSB, DstLSB + Width); in tryBitfieldInsertOpFromOr()
|
| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGExpr.cpp | 2290 Val, ~llvm::APInt::getBitsSet(StorageSize, Offset, Offset + Info.Size), in EmitStoreThroughBitfieldLValue()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6620 APInt::getBitsSet(OpSizeInBits, 16, HighBit))) in MatchBSwapHWordLow()
12247 APInt::getBitsSet(Op.getScalarValueSizeInBits(), in visitZERO_EXTEND()
17532 APInt Mask = ~APInt::getBitsSet(IVal.getValueSizeInBits(), in ShrinkLoadReplaceStoreWithStore()
17680 APInt Mask = APInt::getBitsSet(BitWidth, ShAmt, in ReduceLoadOpStoreWidth()
|
| H A D | TargetLowering.cpp | 1389 APInt::getBitsSet(NumElts, SubIdx, SubIdx + NumSubElts); in SimplifyDemandedBits()
|