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/llvm-project-15.0.7/clang/test/OpenMP/
H A Datomic_compare_codegen.cpp1950 fx = fx > fe ? fe : fx; in foo()
1952 fx = fx < fe ? fe : fx; in foo()
1954 fx = fe > fx ? fe : fx; in foo()
1956 fx = fe < fx ? fe : fx; in foo()
1971 fx = fx > fe ? fe : fx; in foo()
1973 fx = fx < fe ? fe : fx; in foo()
1975 fx = fe > fx ? fe : fx; in foo()
1977 fx = fe < fx ? fe : fx; in foo()
1992 fx = fx > fe ? fe : fx; in foo()
1994 fx = fx < fe ? fe : fx; in foo()
[all …]
H A Datomic_update_codegen.cpp24 float fv, fx; variable
197 fx = fx + fv; in main()
428 fx = fx * ulv; in main()
H A Datomic_capture_codegen.cpp33 float fv, fx; variable
224 dv = fx = fx + fv; in main()
485 {fx = fx * ulv; fv = fx;} in main()
H A Datomic_read_codegen.c25 float fv, fx; variable
135 fv = fx; in main()
201 ulv = fx; in main()
H A Datomic_write_codegen.c25 float fv, fx; variable
137 fx = fv; in main()
226 fx = ulv; in main()
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX904.rst43 …fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src1<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_g…
44 …fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src1<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_g…
45 …fx<amdgpu_synid_gfx904_fx_operand>`, :ref:`src1<amdgpu_synid_gfx904_src_1>`::ref:`m<amdgpu_synid_g…
H A DAMDGPUAsmGFX900.rst43 …fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_g…
44 …fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_g…
45 …fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_g…
H A DAMDGPUAsmGFX906.rst73 …fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_…
74 …fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_…
75 …fx<amdgpu_synid_gfx906_fx_operand>`, :ref:`src1<amdgpu_synid_gfx906_src_1>`::ref:`m<amdgpu_synid_…
H A DAMDGPUAsmGFX908.rst104 …fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src1<amdgpu_synid_gfx908_src_d578c4>`::ref:`m<amdgpu…
105 …fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src1<amdgpu_synid_gfx908_src_d578c4>`::ref:`m<amdgpu…
106 …fx<amdgpu_synid_gfx908_fx_operand>`, :ref:`src1<amdgpu_synid_gfx908_src_d578c4>`::ref:`m<amdgpu…
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A DMergeConsecutiveStores.ll18 @fx = common global %struct.X zeroinitializer, align 4
37 %0 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 0), align 4
38 %1 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 1), align 4
39 %2 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 2), align 4
40 %3 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 3), align 4
59 %0 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 0), align 16
60 %1 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 1), align 4
61 %2 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 2), align 4
62 %3 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 3), align 4
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Ddebug-info-fn-template.cpp9 T fx(XF<T> xi) { in fx() function
15 template int fx(XF<int>);
/llvm-project-15.0.7/libclc/generic/lib/math/
H A Dclc_hypot.cl45 float fx = as_float(ux) * fi_exp;
47 retval = sqrt(mad(fx, fx, fy*fy)) * fx_exp;
/llvm-project-15.0.7/third-party/benchmark/test/
H A Dregister_benchmark_test.cc112 CustomFixture fx; in TestRegistrationAtRuntime() local
113 benchmark::RegisterBenchmark("custom_fixture", fx); in TestRegistrationAtRuntime()
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A Dpr3288.ll56 define void @fx() {
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dfreeze.ll341 %fx = freeze float %x
343 %c = fcmp oeq float %fx, %fy
356 %fx = freeze float %x
358 %c = fcmp nnan oeq float %fx, %fy
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dx86-64-double-shifts-var.ll4 ; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-fx | FileCheck %s
H A Dcpus-amd.ll16 ; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-fx 2>&1 | FileCheck %s --…
H A Dslow-unaligned-mem.ll34 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-fx 2>&1 | FileCheck %s --check-prefi…
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Dlftr-multi-exit.ll380 %fx = shl i32 %iv, 4
382 %c = icmp ult i32 %fx, 1024
421 %fx = udiv i32 %iv, 4
423 %c = icmp ult i32 %fx, 1024
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/
H A Dtest-sparse-saxpy-jagged-matvec.mlir181 %fx = arith.sitofp %kx : i32 to f32
182 memref.store %fx, %X[%i] : memref<?xf32>
H A Dtest-sparse-dot-matvec.mlir200 %fx = arith.sitofp %kx : i32 to f32
201 memref.store %fx, %X[%i] : memref<?xf32>
/llvm-project-15.0.7/llvm/docs/
H A DAMDGPUInstructionNotation.rst100 :fx This is an *f32* or *f16* operand depending on
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86PfmCounters.td178 def : PfmCountersBinding<"athlon-fx", DefaultAMDPfmCounters>;
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dsimd-arith.ll1613 %fx = bitcast <4 x i32> %x to <4 x float>
1615 %c = fcmp olt <4 x float> %fy, %fx
1637 %fx = bitcast <4 x i32> %x to <4 x float>
1639 %c = fcmp olt <4 x float> %fx, %fy
1837 %fx = bitcast <2 x i64> %x to <2 x double>
1839 %c = fcmp olt <2 x double> %fy, %fx
1861 %fx = bitcast <2 x i64> %x to <2 x double>
1863 %c = fcmp olt <2 x double> %fx, %fy
/llvm-project-15.0.7/clang/test/CXX/drs/
H A Ddr5xx.cpp248 int ax = a.x, bx = b.x, cx = c.x, dx = d.x, ex = E::e->x, fx = F::f->x; variable

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