1 
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix=CHECK --check-prefix=CHECK-50 %s
5 
6 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
8 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
9 
10 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck %s
11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
13 
14 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
15 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
17 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
18 // expected-no-diagnostics
19 #ifndef HEADER
20 #define HEADER
21 
22 _Bool bv, bx;
23 char cv, cx;
24 unsigned char ucv, ucx;
25 short sv, sx;
26 unsigned short usv, usx;
27 int iv, ix;
28 unsigned int uiv, uix;
29 long lv, lx;
30 unsigned long ulv, ulx;
31 long long llv, llx;
32 unsigned long long ullv, ullx;
33 float fv, fx;
34 double dv, dx;
35 long double ldv, ldx;
36 _Complex int civ, cix;
37 _Complex float cfv, cfx;
38 _Complex double cdv, cdx;
39 
40 typedef int int4 __attribute__((__vector_size__(16)));
41 int4 int4x;
42 
43 struct BitFields {
44   int : 32;
45   int a : 31;
46 } bfx;
47 
48 struct BitFields_packed {
49   int : 32;
50   int a : 31;
51 } __attribute__ ((__packed__)) bfx_packed;
52 
53 struct BitFields2 {
54   int : 31;
55   int a : 1;
56 } bfx2;
57 
58 struct BitFields2_packed {
59   int : 31;
60   int a : 1;
61 } __attribute__ ((__packed__)) bfx2_packed;
62 
63 struct BitFields3 {
64   int : 11;
65   int a : 14;
66 } bfx3;
67 
68 struct BitFields3_packed {
69   int : 11;
70   int a : 14;
71 } __attribute__ ((__packed__)) bfx3_packed;
72 
73 struct BitFields4 {
74   short : 16;
75   int a: 1;
76   long b : 7;
77 } bfx4;
78 
79 struct BitFields4_packed {
80   short : 16;
81   int a: 1;
82   long b : 7;
83 } __attribute__ ((__packed__)) bfx4_packed;
84 
85 typedef float float2 __attribute__((ext_vector_type(2)));
86 float2 float2x;
87 
88 // Register "0" is currently an invalid register for global register variables.
89 // Use "esp" instead of "0".
90 // register int rix __asm__("0");
91 register int rix __asm__("esp");
92 
main(void)93 int main(void) {
94 // CHECK: [[PREV:%.+]] = atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1
95 // CHECK: store i8 [[PREV]], i8* @{{.+}},
96 #pragma omp atomic capture
97   bv = bx++;
98 // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1
99 // CHECK: add nsw i32 %{{.+}}, 1
100 // CHECK: store i8 %{{.+}}, i8* @{{.+}},
101 #pragma omp atomic capture
102   cv = ++cx;
103 // CHECK: [[PREV:%.+]] = atomicrmw sub i8* @{{.+}}, i8 1 monotonic, align 1
104 // CHECK: store i8 [[PREV]], i8* @{{.+}},
105 #pragma omp atomic capture
106   ucv = ucx--;
107 // CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic, align 2
108 // CHECK: sub nsw i32 %{{.+}}, 1
109 // CHECK: store i16 %{{.+}}, i16* @{{.+}},
110 #pragma omp atomic capture
111   sv = --sx;
112 // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}},
113 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32
114 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2
115 // CHECK: br label %[[CONT:.+]]
116 // CHECK: [[CONT]]
117 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
118 // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32
119 // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]]
120 // CHECK: [[DESIRED_CALC:%.+]] = trunc i32 [[ADD]] to i16
121 // CHECK: store i16 [[DESIRED_CALC]], i16* [[TEMP:%.+]],
122 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
123 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2
124 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
125 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
126 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
127 // CHECK: [[EXIT]]
128 // CHECK: store i16 [[DESIRED_CALC]], i16* @{{.+}},
129 #pragma omp atomic capture
130   sv = usx += usv;
131 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
132 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4
133 // CHECK: br label %[[CONT:.+]]
134 // CHECK: [[CONT]]
135 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
136 // CHECK: [[DESIRED_CALC:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]]
137 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
138 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
139 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
140 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
141 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
142 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
143 // CHECK: [[EXIT]]
144 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
145 #pragma omp atomic capture
146   uiv = ix *= iv;
147 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
148 // CHECK: [[PREV:%.+]] = atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4
149 // CHECK: store i32 [[PREV]], i32* @{{.+}},
150 #pragma omp atomic capture
151   {iv = uix; uix -= uiv;}
152 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
153 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4
154 // CHECK: br label %[[CONT:.+]]
155 // CHECK: [[CONT]]
156 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
157 // CHECK: [[DESIRED_CALC:%.+]] = shl i32 [[EXPECTED]], [[EXPR]]
158 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
159 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
160 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
161 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
162 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
163 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
164 // CHECK: [[EXIT]]
165 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
166 #pragma omp atomic capture
167   {ix <<= iv; uiv = ix;}
168 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
169 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4
170 // CHECK: br label %[[CONT:.+]]
171 // CHECK: [[CONT]]
172 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
173 // CHECK: [[DESIRED_CALC:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]]
174 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
175 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
176 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
177 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
178 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
179 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
180 // CHECK: [[EXIT]]
181 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
182 #pragma omp atomic capture
183   iv = uix >>= uiv;
184 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
185 // CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic, align 8
186 // CHECK: br label %[[CONT:.+]]
187 // CHECK: [[CONT]]
188 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
189 // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]]
190 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
191 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
192 // CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
193 // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0
194 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
195 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
196 // CHECK: [[EXIT]]
197 // CHECK: store i64 [[EXPECTED]], i64* @{{.+}},
198 #pragma omp atomic capture
199   {ulv = lx; lx /= lv;}
200 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
201 // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
202 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]]
203 // CHECK:  store i64 [[DESIRED]], i64* @{{.+}},
204 #pragma omp atomic capture
205   {ulx &= ulv; lv = ulx;}
206 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
207 // CHECK: [[OLD:%.+]] = atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
208 // CHECK: [[DESIRED:%.+]] = xor i64 [[OLD]], [[EXPR]]
209 // CHECK:  store i64 [[DESIRED]], i64* @{{.+}},
210 #pragma omp atomic capture
211   ullv = llx ^= llv;
212 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
213 // CHECK: [[OLD:%.+]] = atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
214 // CHECK: [[DESIRED:%.+]] = or i64 [[OLD]], [[EXPR]]
215 // CHECK:  store i64 [[DESIRED]], i64* @{{.+}},
216 #pragma omp atomic capture
217   llv = ullx |= ullv;
218 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
219 // CHECK: [[OLD:%.+]] = atomicrmw fadd float* @{{.+}}, float [[EXPR]] monotonic, align 4
220 // CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]]
221 // CHECK: [[CAST:%.+]] = fpext float [[ADD]] to double
222 // CHECK: store double [[CAST]], double* @{{.+}},
223 #pragma omp atomic capture
224   dv = fx = fx + fv;
225 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
226 // CHECK: [[X:%.+]] = load atomic i64, i64*  bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8
227 // CHECK: br label %[[CONT:.+]]
228 // CHECK: [[CONT]]
229 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
230 // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
231 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
232 // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]]
233 // CHECK: store double [[SUB]], double* [[TEMP]],
234 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]],
235 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
236 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
237 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
238 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
239 // CHECK: [[EXIT]]
240 // CHECK: [[CAST:%.+]] = fptrunc double [[OLD]] to float
241 // CHECK: store float [[CAST]], float* @{{.+}},
242 #pragma omp atomic capture
243   {fv = dx; dx = dv - dx;}
244 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
245 // CHECK: [[X:%.+]] = load atomic i128, i128*  bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16
246 // CHECK: br label %[[CONT:.+]]
247 // CHECK: [[CONT]]
248 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
249 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
250 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]]
251 // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
252 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]]
253 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]]
254 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]]
255 // CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]]
256 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]]
257 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16
258 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0
259 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
260 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
261 // CHECK: [[EXIT]]
262 // CHECK: [[CAST:%.+]] = fptrunc x86_fp80 [[MUL]] to double
263 // CHECK: store double [[CAST]], double* @{{.+}},
264 #pragma omp atomic capture
265   {ldx = ldx * ldv; dv = ldx;}
266 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0)
267 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1)
268 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
269 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
270 // CHECK: br label %[[CONT:.+]]
271 // CHECK: [[CONT]]
272 // CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
273 // CHECK: [[LD_RE:%.+]] = load i32, i32* [[LD_RE_ADDR]]
274 // CHECK: [[LD_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
275 // CHECK: [[LD_IM:%.+]] = load i32, i32* [[LD_IM_ADDR]]
276 // <Skip checks for complex calculations>
277 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
278 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
279 // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]]
280 // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]]
281 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
282 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
283 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0)
284 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
285 // CHECK: [[EXIT]]
286 // CHECK: [[RE_CAST:%.+]] = sitofp i32 [[NEW_RE]] to float
287 // CHECK: [[IM_CAST:%.+]] = sitofp i32 [[NEW_IM]] to float
288 // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0),
289 // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1),
290 #pragma omp atomic capture
291   cfv = cix = civ / cix;
292 // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0)
293 // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1)
294 // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8*
295 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
296 // CHECK: br label %[[CONT:.+]]
297 // CHECK: [[CONT]]
298 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0
299 // CHECK: [[X_RE_OLD:%.+]] = load float, float* [[X_RE_ADDR]]
300 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1
301 // CHECK: [[X_IM_OLD:%.+]] = load float, float* [[X_IM_ADDR]]
302 // <Skip checks for complex calculations>
303 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
304 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1
305 // CHECK: store float [[NEW_RE:%.+]], float* [[X_RE_ADDR]]
306 // CHECK: store float [[NEW_IM:%.+]], float* [[X_IM_ADDR]]
307 // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8*
308 // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8*
309 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0)
310 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
311 // CHECK: [[EXIT]]
312 // CHECK: [[RE_CAST:%.+]] = fptosi float [[X_RE_OLD]] to i32
313 // CHECK: [[IM_CAST:%.+]] = fptosi float [[X_IM_OLD]] to i32
314 // CHECK: store i32 [[RE_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
315 // CHECK: store i32 [[IM_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
316 #pragma omp atomic capture
317   {civ = cfx; cfx = cfv + cfx;}
318 // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0)
319 // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1)
320 // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8*
321 // CHECK: call void @__atomic_load(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 5)
322 // CHECK: br label %[[CONT:.+]]
323 // CHECK: [[CONT]]
324 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0
325 // CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]]
326 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1
327 // CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]]
328 // <Skip checks for complex calculations>
329 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
330 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1
331 // CHECK: store double [[NEW_RE:%.+]], double* [[X_RE_ADDR]]
332 // CHECK: store double [[NEW_IM:%.+]], double* [[X_IM_ADDR]]
333 // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8*
334 // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8*
335 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 5, i32 noundef 5)
336 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
337 // CHECK: [[EXIT]]
338 // CHECK: [[RE_CAST:%.+]] = fptrunc double [[NEW_RE]] to float
339 // CHECK: [[IM_CAST:%.+]] = fptrunc double [[NEW_IM]] to float
340 // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0),
341 // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1),
342 // CHECK-50: call{{.*}} @__kmpc_flush(
343 #pragma omp atomic capture seq_cst
344   {cdx = cdx - cdv; cfv = cdx;}
345 // CHECK: [[BV:%.+]] = load i8, i8* @{{.+}}
346 // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1
347 // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64
348 // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
349 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]]
350 // CHECK: store i64 [[DESIRED]], i64* @{{.+}},
351 #pragma omp atomic capture
352   ulv = ulx = ulx & bv;
353 // CHECK: [[CV:%.+]]  = load i8, i8* @{{.+}}, align 1
354 // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32
355 // CHECK: [[X:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic, align 1
356 // CHECK: br label %[[CONT:.+]]
357 // CHECK: [[CONT]]
358 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
359 // CHECK: [[OLD_BOOL:%.+]] = trunc i8 [[EXPECTED]] to i1
360 // CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD_BOOL]] to i32
361 // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]]
362 // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0
363 // CHECK: [[NEW:%.+]] = zext i1 [[CAST]] to i8
364 // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]],
365 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
366 // CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1
367 // CHECK: [[OLD:%.+]] = extractvalue { i8, i1 } [[RES]], 0
368 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
369 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
370 // CHECK: [[EXIT]]
371 // CHECK: [[OLD_I8:%.+]] = zext i1 [[OLD_BOOL]] to i8
372 // CHECK: store i8 [[OLD_I8]], i8* @{{.+}},
373 #pragma omp atomic capture
374   {bv = bx; bx = cv & bx;}
375 // CHECK: [[UCV:%.+]]  = load i8, i8* @{{.+}},
376 // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32
377 // CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst, align 1
378 // CHECK: br label %[[CONT:.+]]
379 // CHECK: [[CONT]]
380 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
381 // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32
382 // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]]
383 // CHECK: [[NEW:%.+]] = trunc i32 [[ASHR]] to i8
384 // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]],
385 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
386 // CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1
387 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
388 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
389 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
390 // CHECK: [[EXIT]]
391 // CHECK: store i8 [[NEW]], i8* @{{.+}},
392 // CHECK-50: call{{.*}} @__kmpc_flush(
393 #pragma omp atomic capture, seq_cst
394   {cx = cx >> ucv; cv = cx;}
395 // CHECK: [[SV:%.+]]  = load i16, i16* @{{.+}},
396 // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32
397 // CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic, align 8
398 // CHECK: br label %[[CONT:.+]]
399 // CHECK: [[CONT]]
400 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
401 // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32
402 // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]]
403 // CHECK: [[NEW:%.+]] = sext i32 [[SHL]] to i64
404 // CHECK: store i64 [[NEW]], i64* [[TEMP:%.+]],
405 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
406 // CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
407 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
408 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
409 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
410 // CHECK: [[EXIT]]
411 // CHECK: store i64 [[NEW]], i64* @{{.+}},
412 #pragma omp atomic capture
413   ulv = ulx = sv << ulx;
414 // CHECK: [[USV:%.+]]  = load i16, i16* @{{.+}},
415 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64
416 // CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic, align 8
417 // CHECK: br label %[[CONT:.+]]
418 // CHECK: [[CONT]]
419 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
420 // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]]
421 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
422 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
423 // CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
424 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
425 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
426 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
427 // CHECK: [[EXIT]]
428 // CHECK: store i64 [[EXPECTED]], i64* @{{.+}},
429 #pragma omp atomic capture
430   {lv = lx; lx = lx % usv;}
431 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
432 // CHECK: [[OLD:%.+]] = atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst, align 4
433 // CHECK: [[DESIRED:%.+]] = or i32 [[EXPR]], [[OLD]]
434 // CHECK: store i32 [[DESIRED]], i32* @{{.+}},
435 // CHECK-50: call{{.*}} @__kmpc_flush(
436 #pragma omp atomic seq_cst, capture
437   {uix = iv | uix; uiv = uix;}
438 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
439 // CHECK: [[OLD:%.+]] = atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4
440 // CHECK: [[DESIRED:%.+]] = and i32 [[OLD]], [[EXPR]]
441 // CHECK: store i32 [[DESIRED]], i32* @{{.+}},
442 #pragma omp atomic capture
443   iv = ix = ix & uiv;
444 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
445 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
446 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
447 // CHECK: br label %[[CONT:.+]]
448 // CHECK: [[CONT]]
449 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
450 // CHECK: [[OLD_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
451 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
452 // CHECK: [[OLD_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
453 // <Skip checks for complex calculations>
454 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
455 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
456 // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]]
457 // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]]
458 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
459 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
460 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0)
461 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
462 // CHECK: [[EXIT]]
463 // CHECK: store i32 [[OLD_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
464 // CHECK: store i32 [[OLD_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
465 #pragma omp atomic capture
466   {civ = cix; cix = lv + cix;}
467 // CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}},
468 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float
469 // CHECK: [[X:%.+]] = load atomic i32, i32*  bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4
470 // CHECK: br label %[[CONT:.+]]
471 // CHECK: [[CONT]]
472 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
473 // CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32*
474 // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float
475 // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]]
476 // CHECK: store float [[MUL]], float* [[TEMP]],
477 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]],
478 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
479 // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0
480 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
481 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
482 // CHECK: [[EXIT]]
483 // CHECK: store float [[MUL]], float* @{{.+}},
484 #pragma omp atomic capture
485   {fx = fx * ulv; fv = fx;}
486 // CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}},
487 // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double
488 // CHECK: [[X:%.+]] = load atomic i64, i64*  bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8
489 // CHECK: br label %[[CONT:.+]]
490 // CHECK: [[CONT]]
491 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
492 // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
493 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
494 // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]]
495 // CHECK: store double [[DIV]], double* [[TEMP]],
496 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]],
497 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
498 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
499 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
500 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
501 // CHECK: [[EXIT]]
502 // CHECK: store double [[DIV]], double* @{{.+}},
503 #pragma omp atomic capture
504   dv = dx /= llv;
505 // CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}},
506 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80
507 // CHECK: [[X:%.+]] = load atomic i128, i128*  bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16
508 // CHECK: br label %[[CONT:.+]]
509 // CHECK: [[CONT]]
510 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
511 // CHECK: [[TEMP_I1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
512 // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I1]],
513 // CHECK: [[TEMP_I:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
514 // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I]],
515 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]],
516 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]]
517 // CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]]
518 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[TEMP_I1]]
519 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16
520 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0
521 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
522 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
523 // CHECK: [[EXIT]]
524 // CHECK: store x86_fp80 [[OLD]], x86_fp80* @{{.+}},
525 #pragma omp atomic capture
526   {ldv = ldx; ldx -= ullv;}
527 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
528 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
529 // CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0)
530 // CHECK: br label %[[CONT:.+]]
531 // CHECK: [[CONT]]
532 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
533 // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
534 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
535 // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
536 // <Skip checks for complex calculations>
537 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
538 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
539 // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]]
540 // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]]
541 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
542 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
543 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0)
544 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
545 // CHECK: [[EXIT]]
546 // CHECK: store i32 [[NEW_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
547 // CHECK: store i32 [[NEW_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
548 #pragma omp atomic capture
549   {cix = fv / cix; civ = cix;}
550 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
551 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2
552 // CHECK: br label %[[CONT:.+]]
553 // CHECK: [[CONT]]
554 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
555 // CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32
556 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double
557 // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]]
558 // CHECK: [[NEW:%.+]] = fptosi double [[ADD]] to i16
559 // CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]],
560 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
561 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2
562 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
563 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
564 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
565 // CHECK: [[EXIT]]
566 // CHECK: store i16 [[NEW]], i16* @{{.+}},
567 #pragma omp atomic capture
568   sv = sx = sx + dv;
569 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
570 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1
571 // CHECK: br label %[[CONT:.+]]
572 // CHECK: [[CONT]]
573 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
574 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
575 // CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
576 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80
577 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]]
578 // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000
579 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
580 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
581 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
582 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1
583 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
584 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
585 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
586 // CHECK: [[EXIT]]
587 // CHECK: [[EXPECTED_I8:%.+]] = zext i1 [[BOOL_EXPECTED]] to i8
588 // CHECK: store i8 [[EXPECTED_I8]], i8* @{{.+}},
589 #pragma omp atomic capture
590   {bv = bx; bx = ldv * bx;}
591 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0),
592 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1),
593 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1
594 // CHECK: br label %[[CONT:.+]]
595 // CHECK: [[CONT]]
596 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
597 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
598 // CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
599 // CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]]
600 // CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0
601 // CHECK: icmp ne i32 [[SUB_RE]], 0
602 // CHECK: icmp ne i32 [[SUB_IM]], 0
603 // CHECK: [[BOOL_DESIRED:%.+]] = or i1
604 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
605 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
606 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
607 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1
608 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
609 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
610 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
611 // CHECK: [[EXIT]]
612 // CHECK: [[DESIRED_I8:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
613 // CHECK: store i8 [[DESIRED_I8]], i8* @{{.+}},
614 #pragma omp atomic capture
615   {bx = civ - bx; bv = bx;}
616 // CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}}
617 // CHECK: load i8, i8*
618 // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32
619 // CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16
620 // CHECK: br label %[[CONT:.+]]
621 // CHECK: [[CONT]]
622 // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
623 // CHECK: [[TEMP_I:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128*
624 // CHECK: store i128 [[OLD_I128]], i128* [[TEMP_I]],
625 // CHECK: [[LD:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32>
626 // CHECK: store <4 x i32> [[LD]], <4 x i32>* [[TEMP1:%.+]],
627 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP1]]
628 // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]]
629 // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]]
630 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]]
631 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]]
632 // CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]]
633 // CHECK: [[NEW_I128:%.+]] = load i128, i128* [[TEMP_I]],
634 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16
635 // CHECK: [[FAILED_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0
636 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1
637 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
638 // CHECK: [[EXIT]]
639 // CHECK: store i32 [[OR]], i32* @{{.+}},
640 #pragma omp atomic capture
641   {int4x[sv] |= bv; iv = int4x[sv];}
642 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
643 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4
644 // CHECK: br label %[[CONT:.+]]
645 // CHECK: [[CONT]]
646 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
647 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
648 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
649 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
650 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
651 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
652 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
653 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
654 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
655 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
656 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
657 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
658 // CHECK: [[BF_SET:%.+]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
659 // CHECK: store i32 [[BF_SET]], i32* [[TEMP1]],
660 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]],
661 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
662 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
663 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
664 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
665 // CHECK: [[EXIT]]
666 // CHECK: store i32 [[CONV]], i32* @{{.+}},
667 #pragma omp atomic capture
668   iv = bfx.a = bfx.a - ldv;
669 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
670 // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
671 // CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST]], i32 noundef 0)
672 // CHECK: br label %[[CONT:.+]]
673 // CHECK: [[CONT]]
674 // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]],
675 // CHECK: store i32 [[OLD]], i32* [[TEMP1:%.+]],
676 // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]],
677 // CHECK: store i32 [[OLD]], i32* [[TEMP:%.+]],
678 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
679 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
680 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
681 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
682 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
683 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32
684 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
685 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
686 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
687 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
688 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
689 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
690 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8*
691 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
692 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
693 // CHECK: [[EXIT]]
694 // CHECK: store i32 [[A_ASHR]], i32* @{{.+}},
695 #pragma omp atomic capture
696   {iv = bfx_packed.a; bfx_packed.a *= ldv;}
697 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
698 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4
699 // CHECK: br label %[[CONT:.+]]
700 // CHECK: [[CONT]]
701 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
702 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
703 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
704 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
705 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31
706 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
707 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
708 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
709 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
710 // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1
711 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31
712 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647
713 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
714 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
715 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
716 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
717 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
718 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
719 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
720 // CHECK: [[EXIT]]
721 // CHECK: store i32 [[CONV]], i32* @{{.+}},
722 #pragma omp atomic capture
723   {bfx2.a -= ldv; iv = bfx2.a;}
724 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
725 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1
726 // CHECK: br label %[[CONT:.+]]
727 // CHECK: [[CONT]]
728 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
729 // CHECK: [[BITCAST_NEW:%.+]] = bitcast i32* %{{.+}} to i8*
730 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST_NEW]],
731 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
732 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
733 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
734 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7
735 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32
736 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
737 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]]
738 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
739 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8
740 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST_NEW]],
741 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1
742 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7
743 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127
744 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
745 // CHECK: store i8 %{{.+}}, i8* [[BITCAST_NEW]]
746 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST_NEW]]
747 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
748 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
749 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
750 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
751 // CHECK: [[EXIT]]
752 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
753 #pragma omp atomic capture
754   iv = bfx2_packed.a = ldv / bfx2_packed.a;
755 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
756 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4
757 // CHECK: br label %[[CONT:.+]]
758 // CHECK: [[CONT]]
759 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
760 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
761 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
762 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
763 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7
764 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18
765 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
766 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]]
767 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
768 // CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]],
769 // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383
770 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11
771 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385
772 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
773 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
774 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
775 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
776 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
777 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
778 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
779 // CHECK: [[EXIT]]
780 // CHECK: store i32 [[A_ASHR]], i32* @{{.+}},
781 #pragma omp atomic capture
782   {iv = bfx3.a; bfx3.a /= ldv;}
783 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
784 // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24*
785 // CHECK: [[BITCAST:%.+]] = bitcast i24* [[LDTEMP]] to i8*
786 // CHECK: call void @__atomic_load(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST]], i32 noundef 0)
787 // CHECK: br label %[[CONT:.+]]
788 // CHECK: [[CONT]]
789 // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]],
790 // CHECK: store i24 [[OLD]], i24* [[BITCAST2:%.+]],
791 // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]],
792 // CHECK: store i24 [[OLD]], i24* [[BITCAST1:%.+]],
793 // CHECK: [[A_LD:%.+]] = load i24, i24* [[BITCAST1]],
794 // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7
795 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10
796 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32
797 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
798 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]]
799 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32
800 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24
801 // CHECK: [[BF_LD:%.+]] = load i24, i24* [[BITCAST2]],
802 // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383
803 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3
804 // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065
805 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]]
806 // CHECK: store i24 %{{.+}}, i24* [[BITCAST2]]
807 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8*
808 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8*
809 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0)
810 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
811 // CHECK: [[EXIT]]
812 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
813 #pragma omp atomic capture
814   {bfx3_packed.a += ldv; iv = bfx3_packed.a;}
815 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
816 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8
817 // CHECK: br label %[[CONT:.+]]
818 // CHECK: [[CONT]]
819 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
820 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
821 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
822 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
823 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47
824 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63
825 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32
826 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80
827 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
828 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32
829 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64
830 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
831 // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1
832 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16
833 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537
834 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
835 // CHECK: store i64 %{{.+}}, i64* [[TEMP1]]
836 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
837 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8
838 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
839 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
840 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
841 // CHECK: [[EXIT]]
842 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
843 #pragma omp atomic relaxed capture
844   iv = bfx4.a = bfx4.a * ldv;
845 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
846 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1
847 // CHECK: br label %[[CONT:.+]]
848 // CHECK: [[CONT]]
849 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
850 // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8*
851 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
852 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
853 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
854 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
855 // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7
856 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7
857 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32
858 // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80
859 // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]]
860 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32
861 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8
862 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
863 // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1
864 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2
865 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
866 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
867 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
868 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
869 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
870 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
871 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
872 // CHECK: [[EXIT]]
873 // CHECK: store i32 [[CAST]], i32* @{{.+}},
874 #pragma omp atomic capture relaxed
875   {iv = bfx4_packed.a; bfx4_packed.a -= ldv;}
876 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
877 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8
878 // CHECK: br label %[[CONT:.+]]
879 // CHECK: [[CONT]]
880 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
881 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
882 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
883 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
884 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40
885 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57
886 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80
887 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]]
888 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64
889 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
890 // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127
891 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17
892 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145
893 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
894 // CHECK: store i64 [[VAL]], i64* [[TEMP1]]
895 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
896 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] release monotonic, align 8
897 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
898 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
899 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
900 // CHECK: [[EXIT]]
901 // CHECK: [[NEW_VAL:%.+]] = trunc i64 [[CONV]] to i32
902 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
903 // CHECK-50: call{{.*}} @__kmpc_flush(
904 #pragma omp atomic capture release
905   {bfx4.b /= ldv; iv = bfx4.b;}
906 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
907 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) acquire, align 1
908 // CHECK: br label %[[CONT:.+]]
909 // CHECK: [[CONT]]
910 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
911 // CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8*
912 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
913 // CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8*
914 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
915 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
916 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1
917 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64
918 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80
919 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]]
920 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64
921 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8
922 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
923 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127
924 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1
925 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1
926 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
927 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
928 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
929 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] acquire acquire, align 1
930 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
931 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
932 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
933 // CHECK: [[EXIT]]
934 // CHECK: [[NEW_VAL_I32:%.+]] = trunc i64 [[NEW_VAL]] to i32
935 // CHECK: store i32 [[NEW_VAL_I32]], i32* @{{.+}},
936 // CHECK-50: call{{.*}} @__kmpc_flush(
937 #pragma omp atomic capture acquire
938   iv = bfx4_packed.b += ldv;
939 // CHECK: load i64, i64*
940 // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float
941 // CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) acquire, align 8
942 // CHECK: br label %[[CONT:.+]]
943 // CHECK: [[CONT]]
944 // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ]
945 // CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP1:%.+]] to i64*
946 // CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]],
947 // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float>
948 // CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]],
949 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]]
950 // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0
951 // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]]
952 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP1]],
953 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0
954 // CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP1]]
955 // CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]]
956 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] acq_rel acquire, align 8
957 // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0
958 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
959 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
960 // CHECK: [[EXIT]]
961 // CHECK: store float [[X]], float* @{{.+}},
962 // CHECK-50: call{{.*}} @__kmpc_flush(
963 #pragma omp atomic capture acq_rel
964   {fv = float2x.x; float2x.x = ulv - float2x.x;}
965 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
966 // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]])
967 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double
968 // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]]
969 // CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32
970 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]])
971 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
972 // CHECK-50: call{{.*}} @__kmpc_flush(
973 #pragma omp atomic capture seq_cst
974   {rix = dv / rix; iv = rix;}
975 // CHECK: [[OLD_VAL:%.+]] = atomicrmw xchg i32* @{{.+}}, i32 5 monotonic, align 4
976 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[OLD_VAL]])
977 #pragma omp atomic capture
978   {rix = ix; ix = 5;}
979   return 0;
980 }
981 #endif
982