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Searched refs:enableSIMDIndex32 (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/mlir/include/mlir/Dialect/SparseTensor/Transforms/
H A DPasses.h73 enableSIMDIndex32(e), enableVLAVectorization(vla) {} in SparsificationOptions()
81 bool enableSIMDIndex32; member
H A DPasses.td72 Option<"enableSIMDIndex32", "enable-simd-index32", "bool", "false",
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SparseTensor/Pipelines/
H A DPasses.h41 PassOptions::Option<bool> enableSIMDIndex32{
55 vectorLength, enableSIMDIndex32, in sparsificationOptions()
/llvm-project-15.0.7/mlir/lib/Dialect/SparseTensor/Transforms/
H A DSparseTensorPasses.cpp46 enableSIMDIndex32 = options.enableSIMDIndex32; in SparsificationPass()
60 enableSIMDIndex32, enableVLAVectorization); in runOnOperation()
H A DSparsification.cpp855 !codegen.options.enableSIMDIndex32) in genLoad()