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Searched refs:emitRRR (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2857 TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI); in loadImmediate()
4143 TOut.emitRRR(IsUnsigned ? Mips::SLTu : Mips::SLT, ATRegNum, in expandCondBranches()
4235 TOut.emitRRR(SubOp, RdReg, ZeroReg, RsReg, IDLoc, STI); in expandDivRem()
4419 TOut.emitRRR(Mips::OR, DstReg, DstReg, ATReg, IDLoc, STI); in expandUlh()
4465 TOut.emitRRR(Mips::OR, DstReg, DstReg, ATReg, IDLoc, STI); in expandUsh()
4558 TOut.emitRRR(OpCode, DstReg, SrcReg, OpReg, IDLoc, STI); in expandSge()
4662 TOut.emitRRR(OpCode, DstReg, ImmReg, SrcReg, IDLoc, STI); in expandSgtImm()
4695 TOut.emitRRR(OpCode, DstReg, OpReg, SrcReg, IDLoc, STI); in expandSle()
4743 TOut.emitRRR(OpRegCode, DstReg, ImmReg, SrcReg, IDLoc, STI); in expandSleImm()
5406 TOut.emitRRR(isGP64bit() ? Mips::DADDu : Mips::ADDu, in expandSeqI()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp226 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR() function in MipsTargetStreamer
269 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(), in emitAddu()
342 emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI); in emitStoreWithImmOffset()
378 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI); in emitLoadWithImmOffset()
1254 emitRRR(Mips::OR64, RegOrOffset, GPReg, Mips::ZERO, SMLoc(), &STI); in emitDirectiveCpsetup()
1294 emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI); in emitDirectiveCpsetup()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsTargetStreamer.h134 void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2,