MipsAsmParser.cpp - OpenGrok cross reference for /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp

Lines Matching refs:emitRRR
2765       TOut.emitRRR(ABI.GetPtrAdduOp(), DstReg, TmpReg, SrcReg, IDLoc, STI);  in loadImmediate()
2781           TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI);  in loadImmediate()
2792         TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI);  in loadImmediate()
2800       TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI);  in loadImmediate()
2820       TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI);  in loadImmediate()
2857     TOut.emitRRR(AdduOp, DstReg, TmpReg, SrcReg, IDLoc, STI);  in loadImmediate()
2950         TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, DstReg, GPReg,  in loadAndAddSymbolAddress()
2995       TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, TmpReg, TmpReg, GPReg,  in loadAndAddSymbolAddress()
3007         TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, TmpReg, SrcReg,  in loadAndAddSymbolAddress()
3072       TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, TmpReg, SrcReg,  in loadAndAddSymbolAddress()
3121       TOut.emitRRR(Mips::DADDu, DstReg, ATReg, SrcReg, IDLoc, STI);  in loadAndAddSymbolAddress()
3146       TOut.emitRRR(Mips::DADDu, DstReg, DstReg, ATReg, IDLoc, STI);  in loadAndAddSymbolAddress()
3148         TOut.emitRRR(Mips::DADDu, DstReg, DstReg, SrcReg, IDLoc, STI);  in loadAndAddSymbolAddress()
3172         TOut.emitRRR(Mips::DADDu, DstReg, DstReg, SrcReg, IDLoc, STI);  in loadAndAddSymbolAddress()
3211     TOut.emitRRR(Mips::ADDu, DstReg, TmpReg, SrcReg, IDLoc, STI);  in loadAndAddSymbolAddress()
3531       TOut.emitRRR(Mips::MTHC1_D32, FirstReg, FirstReg, TmpReg, IDLoc, STI);  in expandLoadDoubleImmToFPR()
3736       TOut.emitRRR(ABI.ArePtrs64bit() ? Mips::DADDu : Mips::ADDu, TmpReg,  in expandMem16Inst()
3787           TOut.emitRRR(Mips::DADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);  in expandMem16Inst()
3793           TOut.emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);  in expandMem16Inst()
4143   TOut.emitRRR(IsUnsigned ? Mips::SLTu : Mips::SLT, ATRegNum,  in expandCondBranches()
4229       TOut.emitRRR(Mips::OR, RdReg, ZeroReg, ZeroReg, IDLoc, STI);  in expandDivRem()
4232       TOut.emitRRR(Mips::OR, RdReg, RsReg, Mips::ZERO, IDLoc, STI);  in expandDivRem()
4235       TOut.emitRRR(SubOp, RdReg, ZeroReg, RsReg, IDLoc, STI);  in expandDivRem()
4419   TOut.emitRRR(Mips::OR, DstReg, DstReg, ATReg, IDLoc, STI);  in expandUlh()
4465     TOut.emitRRR(Mips::OR, DstReg, DstReg, ATReg, IDLoc, STI);  in expandUsh()
4525     TOut.emitRRR(Mips::OR, TmpReg, DstReg, Mips::ZERO, IDLoc, STI);  in expandUxw()
4558   TOut.emitRRR(OpCode, DstReg, SrcReg, OpReg, IDLoc, STI);  in expandSge()
4613     TOut.emitRRR(OpRegCode, DstReg, SrcReg, ImmReg, IDLoc, STI);  in expandSgeImm()
4662   TOut.emitRRR(OpCode, DstReg, ImmReg, SrcReg, IDLoc, STI);  in expandSgtImm()
4695   TOut.emitRRR(OpCode, DstReg, OpReg, SrcReg, IDLoc, STI);  in expandSle()
4743   TOut.emitRRR(OpRegCode, DstReg, ImmReg, SrcReg, IDLoc, STI);  in expandSleImm()
4848       TOut.emitRRR(FinalOpcode, DstReg, DstReg, SrcReg, IDLoc, STI);  in expandAliasImmediate()
4850       TOut.emitRRR(FinalOpcode, FinalDstReg, FinalDstReg, DstReg, IDLoc, STI);  in expandAliasImmediate()
4876       TOut.emitRRR(Mips::SUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI);  in expandRotation()
4877       TOut.emitRRR(Mips::ROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI);  in expandRotation()
4882       TOut.emitRRR(Mips::ROTRV, DReg, SReg, TReg, Inst.getLoc(), STI);  in expandRotation()
4907     TOut.emitRRR(Mips::SUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), STI);  in expandRotation()
4908     TOut.emitRRR(FirstShift, ATReg, SReg, ATReg, Inst.getLoc(), STI);  in expandRotation()
4909     TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI);  in expandRotation()
4910     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);  in expandRotation()
4973     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);  in expandRotationImm()
5001       TOut.emitRRR(Mips::DSUBu, TmpReg, Mips::ZERO, TReg, Inst.getLoc(), STI);  in expandDRotation()
5002       TOut.emitRRR(Mips::DROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI);  in expandDRotation()
5007       TOut.emitRRR(Mips::DROTRV, DReg, SReg, TReg, Inst.getLoc(), STI);  in expandDRotation()
5032     TOut.emitRRR(Mips::DSUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), STI);  in expandDRotation()
5033     TOut.emitRRR(FirstShift, ATReg, SReg, ATReg, Inst.getLoc(), STI);  in expandDRotation()
5034     TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI);  in expandDRotation()
5035     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);  in expandDRotation()
5130     TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);  in expandDRotationImm()
5146     TOut.emitRRR(Mips::ADDu, FirstRegOp, SecondRegOp, Mips::ZERO, IDLoc, STI);  in expandAbs()
5149   TOut.emitRRR(Mips::SUB, FirstRegOp, Mips::ZERO, SecondRegOp, IDLoc, STI);  in expandAbs()
5374     TOut.emitRRR(Mips::XOR, DstReg, SrcReg, OpReg, IDLoc, STI);  in expandSeq()
5406     TOut.emitRRR(isGP64bit() ? Mips::DADDu : Mips::ADDu,  in expandSeqI()
5428     TOut.emitRRR(Mips::XOR, DstReg, SrcReg, ATReg, IDLoc, STI);  in expandSeqI()
5455     TOut.emitRRR(Mips::XOR, DstReg, SrcReg, OpReg, IDLoc, STI);  in expandSne()
5456     TOut.emitRRR(Mips::SLTu, DstReg, Mips::ZERO, DstReg, IDLoc, STI);  in expandSne()
5461   TOut.emitRRR(Mips::SLTu, DstReg, Mips::ZERO, Reg, IDLoc, STI);  in expandSne()
5481     TOut.emitRRR(Mips::SLTu, DstReg, Mips::ZERO, SrcReg, IDLoc, STI);  in expandSneI()
5503     TOut.emitRRR(Mips::SLTu, DstReg, Mips::ZERO, DstReg, IDLoc, STI);  in expandSneI()
5515   TOut.emitRRR(Mips::XOR, DstReg, SrcReg, ATReg, IDLoc, STI);  in expandSneI()
5516   TOut.emitRRR(Mips::SLTu, DstReg, Mips::ZERO, DstReg, IDLoc, STI);  in expandSneI()