Searched refs:emitRR (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3400 TOut.emitRR(Mips::MTC1, FirstReg, TmpReg, IDLoc, STI); in expandLoadSingleImmToFPR()
4241 TOut.emitRR(DivOp, RsReg, ATReg, IDLoc, STI); in expandDivRem()
4264 TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI); in expandDivRem()
4282 TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI); in expandDivRem()
4350 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
4351 TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI); in expandTrunc()
4355 TOut.emitRR(Mips::CTC1, Mips::RA, ATReg, IDLoc, STI); in expandTrunc()
4360 TOut.emitRR(Mips::CTC1, Mips::RA, ThirdReg, IDLoc, STI); in expandTrunc()
5262 TOut.emitRR(Mips::DMULTu, SrcReg, TmpReg, IDLoc, STI); in expandDMULMacro()
5743 TOut.emitRR(Opcode, RtReg, BaseReg, IDLoc, STI); in expandSaaAddr()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 199 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR() function in MipsTargetStreamer
290 emitRR(Opc, Mips::ZERO, Mips::ZERO, IDLoc, STI); in emitEmptyDelaySlot()
302 emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI); in emitNop()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsTargetStreamer.h | 130 void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc,
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