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Searched refs:bs1 (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dmerge-buffer-stores.ll17 %bs1 = and i32 %arg1, 1073741820
18 %ep1 = getelementptr i32, i32 addrspace(6)* %arg3, i32 %bs1
22 %bs2 = or i32 %bs1, 1
27 %bs3 = or i32 %bs1, 2
32 %bs4 = or i32 %bs1, 3
52 %bs1 = and i32 %arg1, 1073741820
53 %ep1 = getelementptr <{ [64 x i32] }>, <{ [64 x i32] }> addrspace(6)* null, i32 0, i32 0, i32 %bs1
57 %bs2 = or i32 %bs1, 1
62 %bs3 = or i32 %bs1, 2
67 %bs4 = or i32 %bs1, 3
/llvm-project-15.0.7/llvm/test/TableGen/
H A DMultiClassInherit.td59 multiclass s1<int as1, int bs1> : t1<as1> {
60 def S5 : C1<bs1, "moo"> {
64 def S6 : C1<bs1, "baz">;
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dbswap-vector.ll270 %bs1 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
271 %bs2 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %bs1)
280 %bs1 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
281 %bs2 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %bs1)
290 %bs1 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
291 %bs2 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %bs1)
310 %bs1 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
311 %bs2 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %bs1)
320 %bs1 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
321 %bs2 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %bs1)
[all …]
/llvm-project-15.0.7/flang/test/Evaluate/
H A Dfolding07.f907 bs1 = bit_size(0_1), & variable
12 logical, parameter :: test_bit_size_1 = bs1 == 8
/llvm-project-15.0.7/mlir/lib/Dialect/Async/Transforms/
H A DAsyncParallelFor.cpp859 Value bs1 = b.create<arith::MaxSIOp>(bs0, minTaskSize); in matchAndRewrite() local
860 Value blockSize = b.create<arith::MinSIOp>(tripCount, bs1); in matchAndRewrite()