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Searched refs:asmstr (Results 1 – 25 of 49) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430InstrFormats.td41 let AsmString = asmstr;
48 : MSP430Inst<outs, ins, size, asmstr> {
84 : MSP430Inst<outs, ins, 2, asmstr> {
143 : MSP430Inst<outs, ins, 4, asmstr> {
211 : MSP430Inst<outs, ins, 2, asmstr> {
270 : MSP430Inst<outs, ins, 4, asmstr> {
319 : MSP430Inst<outs, ins, size, asmstr> {
358 : MSP430Inst<outs, ins, 2, asmstr> {
404 : MSP430Inst<outs, ins, 2, asmstr> {
425 : MSP430Inst<outs, ins, 2, asmstr> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreInstrFormats.td19 let AsmString = asmstr;
27 : InstXCore<0, outs, ins, asmstr, pattern> {
36 : InstXCore<2, outs, ins, asmstr, pattern> {
45 : _F3R<opc, outs, ins, asmstr, pattern> {
50 : InstXCore<4, outs, ins, asmstr, pattern> {
66 : InstXCore<2, outs, ins, asmstr, pattern> {
74 : _F2RUS<opc, outs, ins, asmstr, pattern> {
164 : _F2R<opc, outs, ins, asmstr, pattern> {
176 : _F2R<opc, outs, ins, asmstr, pattern> {
190 : _FRUS<opc, outs, ins, asmstr, pattern> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrFormats.td25 let AsmString = asmstr;
91 let AsmString = asmstr;
147 string asmstr>
213 : I<opcode, OOL, IOL, asmstr, itin> {
225 : I<opcode, OOL, IOL, asmstr, itin> {
239 : I<opcode, OOL, IOL, asmstr, itin> {
1337 : I<31, OOL, IOL, asmstr, itin> {
1352 : I<31, OOL, IOL, asmstr, itin> {
1369 : I<31, OOL, IOL, asmstr, itin> {
2089 : I<4, OOL, IOL, asmstr, itin> {
[all …]
H A DPPCInstrMMA.td16 string asmstr> {
32 string asmstr> {
33 defm NAME : ACC_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;
56 string asmstr> {
57 defm NAME : ACC_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;
80 string asmstr> {
81 defm NAME : ACC_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;
103 string asmstr> {
112 !strconcat(asmbase#"pp ", asmstr), IIC_VecFP, []>,
182 defm NAME : ACC_UM_XOEO<opcode, xo, IOL, asmbase, asmstr>;
[all …]
H A DPPCInstrP10.td121 let AsmString = asmstr;
154 : I<4, OOL, IOL, asmstr, itin> {
306 : I<opcode, OOL, IOL, asmstr, itin> {
353 : I<4, OOL, IOL, asmstr, itin> {
385 : I<4, OOL, IOL, asmstr, itin> {
403 : I<4, OOL, IOL, asmstr, itin> {
421 : I<4, OOL, IOL, asmstr, itin> {
550 : I<opcode, OOL, IOL, asmstr, itin> {
757 : I<opcode, OOL, IOL, asmstr, itin> {
821 : I<opcode, OOL, IOL, asmstr, itin> {
[all …]
H A DPPCInstrSPE.td14 class EFXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
16 I<4, OOL, IOL, asmstr, itin> {
29 class EFXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
35 class EFXForm_2a<bits<11> xo, dag OOL, dag IOL, string asmstr,
41 class EFXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
43 I<4, OOL, IOL, asmstr, itin> {
55 class EVXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
57 I<4, OOL, IOL, asmstr, itin> {
84 I<4, OOL, IOL, asmstr, itin> {
100 I<4, OOL, IOL, asmstr, itin> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRInstrFormats.td20 let AsmString = asmstr;
28 : AVRInst<outs, ins, asmstr, pattern> {
36 : AVRInst<outs, ins, asmstr, pattern> {
51 : AVRInst16<outs, ins, asmstr, pattern> {
94 : AVRInst16<outs, ins, asmstr, pattern> {
116 : AVRInst16<outs, ins, asmstr, pattern> {
155 : AVRInst16<outs, ins, asmstr, pattern> {
542 : Pseudo<outs, ins, asmstr, pattern> {
547 : Pseudo<outs, ins, asmstr, pattern> {
552 : Pseudo<outs, ins, asmstr, pattern> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcInstrFormats.td22 let AsmString = asmstr;
38 : InstSP<outs, ins, asmstr, pattern, itin> {
50 : F2<outs, ins, asmstr, pattern, itin> {
60 : F2<outs, ins, asmstr, pattern, itin> {
125 : F3<outs, ins, asmstr, pattern, itin> {
145 : F3<outs, ins, asmstr, pattern, itin> {
158 : F3<outs, ins, asmstr, pattern, itin> {
171 : F3<outs, ins, asmstr, pattern, itin> {
185 : F3<outs, ins, asmstr, pattern, itin> {
198 : F3<outs, ins, asmstr, pattern, itin> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCInstrFormats.td102 let AsmString = asmstr;
634 string asmstr> :
635 InstARC<2, outs, ins, asmstr, []> {
647 InstARC<2, outs, ins, asmstr, []> {
656 asmstr> {
727 asmstr, []> {
816 !strconcat(asmstr, "\t$b, $c")>;
820 !strconcat(asmstr, "\t$b, $c")>;
907 F16_SP_OPS<i, outs, ins, asmstr> {
1031 !strconcat(asmstr, "\t$s")> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMips16InstrFormats.td44 let AsmString = asmstr;
104 MipsInst16<outs, ins, asmstr, pattern, itin>
119 MipsInst16<outs, ins, asmstr, pattern, itin>
136 MipsInst16<outs, ins, asmstr, pattern, itin>
152 MipsInst16<outs, ins, asmstr, pattern, itin>
169 MipsInst16<outs, ins, asmstr, pattern, itin>
189 MipsInst16<outs, ins, asmstr, pattern, itin>
207 MipsInst16<outs, ins, asmstr, pattern, itin>
233 MipsInst16<outs, ins, asmstr, pattern, itin>
253 MipsInst16<outs, ins, asmstr, pattern, itin>
[all …]
H A DMips16InstrInfo.td67 class FI816_ins<bits<3> _func, string asmstr,
85 class FRI16_ins<bits<5> op, string asmstr,
99 class FRI16R_ins<bits<5> op, string asmstr,
120 class FEXT_CCRXI16_ins<string asmstr>:
129 class FJAL16_ins<bits<1> _X, string asmstr,
180 class FCCRR16_ins<string asmstr> :
307 class FMULT16_ins<string asmstr> :
314 class FMULT16_LO_ins<string asmstr> :
339 class FRRTR16_ins<string asmstr> :
382 string asmstr, InstrItinClass itin>:
[all …]
/llvm-project-15.0.7/llvm/test/TableGen/
H A DSlice.td15 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
20 string AssemblyString = asmstr;
65 multiclass scalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> {
67 !strconcat(asmstr, "\t$dst, $src"),
70 !strconcat(asmstr, "\t$dst, $src"),
74 multiclass vscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> {
76 !strconcat(asmstr, "\t$dst, $src"),
79 !strconcat(asmstr, "\t$dst, $src"),
83 multiclass myscalar<bits<8> opcode, string asmstr = "", list<list<dag>> patterns = []> :
84 scalar<opcode, asmstr, patterns>,
[all …]
H A Dcast.td21 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
26 string AssemblyString = asmstr;
72 multiclass arith<bits<8> opcode, string asmstr, string Intr> {
74 !strconcat(asmstr, "\t$dst, $src1, $src2"),
78 !strconcat(asmstr, "\t$dst, $src1, $src2"),
84 class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> :
86 !strconcat(asmstr, "\t$dst, $src1, $src2"),
90 multiclass arith_int<bits<8> opcode, string asmstr, string Intr> {
91 def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))>;
93 def PD_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_pd"))>;
H A DMultiPat.td25 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
30 string AssemblyString = asmstr;
84 class Base<bits<8> opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr,
86 : Inst<opcode, opnds, iopnds, asmstr,
98 multiclass arith<bits<8> opcode, string asmstr, string intr, list<list<dag>> patterns> {
100 …!strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_ps", intr)), patte…
103 …!strconcat(asmstr, "\t$dst, $src1, $src2"), !cast<Intrinsic>(!subst("SUFFIX", "_pd", intr)), patte…
H A DTargetInstrSpec.td22 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
27 string AssemblyString = asmstr;
77 multiclass arith<bits<8> opcode, string asmstr, string intr, list<dag> patterns> {
79 !strconcat(asmstr, "\t$dst, $src1, $src2"),
86 !strconcat(asmstr, "\t$dst, $src1, $src2"),
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEInstrFormats.td35 let AsmString = asmstr;
69 : InstVE<outs, ins, asmstr, pattern> {
94 class RRM<bits<8>opVal, dag outs, dag ins, string asmstr,
96 : RM<opVal, outs, ins, asmstr, pattern>;
102 : RRM<opVal, outs, ins, asmstr, pattern> {
116 : InstVE<outs, ins, asmstr, pattern> {
145 : InstVE<outs, ins, asmstr, pattern> {
176 : InstVE<outs, ins, asmstr, pattern> {
207 : InstVE<outs, ins, asmstr, pattern> {
245 : InstVE<outs, ins, asmstr, pattern> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFormats.td17 class WebAssemblyInst<bits<32> inst, string asmstr, bit stack, bit is64>
26 let AsmString = asmstr;
34 string asmstr = "", bits<32> inst = -1, bit is64 = false>
35 : WebAssemblyInst<inst, asmstr, stack, is64> {
44 // based version of this instruction, as well as the corresponding asmstr.
65 multiclass NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
67 defm "": I<oops, iops, oops, iops, pattern, asmstr, asmstr, inst>;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonInstrFormatsV65.td23 class CVI_VA_Resource_NoOpcode<dag outs, dag ins, string asmstr,
26 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VA>;
28 class CVI_GATHER_TMP_LD_Resource_NoOpcode<dag outs, dag ins, string asmstr,
31 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_GATHER>;
H A DHexagonInstrFormats.td50 class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern,
57 let AsmString = asmstr;
192 InstHexagon<outs, ins, asmstr, [], "", itin, type>;
199 class LDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
208 class STInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
213 class Endloop<dag outs, dag ins, string asmstr, list<dag> pattern = [],
215 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeENDLOOP>,
219 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern = [],
221 : InstHexagon<outs, ins, asmstr, pattern, cstr, PSEUDO, TypePSEUDO>,
225 class PseudoM<dag outs, dag ins, string asmstr, list<dag> pattern = [],
[all …]
H A DHexagonInstrFormatsV60.td17 class CVI_VA_Resource<dag outs, dag ins, string asmstr,
20 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VA>,
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiInstrFormats.td23 let AsmString = asmstr;
197 : InstLanai<outs, ins, asmstr, pattern> {
258 : InstLanai<outs, ins, asmstr, pattern> {
328 : InstLanai<outs, ins, asmstr, pattern> {
356 : InstLanai<outs, ins, asmstr, pattern> {
389 class InstSCC<dag outs, dag ins, string asmstr,
391 : InstLanai<outs, ins, asmstr, pattern> {
427 : InstLanai<outs, ins, asmstr, pattern> {
455 : InstLanai<outs, ins, asmstr, pattern> {
500 : InstLanai<outs, ins, asmstr, pattern> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZInstrFormats.td21 let AsmString = asmstr;
1631 : InstE<0, outs, ins, asmstr, pattern> {
1638 : InstRIa<0, outs, ins, asmstr, pattern> {
1663 : InstRIS<0, outs, ins, asmstr, pattern> {
1671 : InstRR<0, outs, ins, asmstr, pattern> {
1678 : InstRRE<0, outs, ins, asmstr, pattern> {
1692 : InstRRS<0, outs, ins, asmstr, pattern> {
1700 : InstRSa<0, outs, ins, asmstr, pattern> {
1718 : InstRSI<0, outs, ins, asmstr, pattern> {
1766 : InstS<0, outs, ins, asmstr, pattern> {
[all …]
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFInstrFormats.td101 class InstBPF<dag outs, dag ins, string asmstr, list<dag> pattern>
115 let AsmString = asmstr;
120 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
121 : InstBPF<outs, ins, asmstr, pattern> {
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVInstrFormats.td13 class Op<bits<16> Opcode, dag outs, dag ins, string asmstr, list<dag> pattern = []>
24 let AsmString = asmstr;
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXInstrFormats.td22 class NVPTXInst<dag outs, dag ins, string asmstr, list<dag> pattern>
29 let AsmString = asmstr;

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