[WebAssembly][NFC] Convert IsWasm64 instruction field to 'bit' from string

Extends the cleanup in D125713 to IsWasm64.

Differential Revision: https://reviews.llvm.org/D125714

[WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string

This is (IMHO) cleaner and (objectively) more strongly typed than using strings.

A follow-on patch will do the same for

[WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string

This is (IMHO) cleaner and (objectively) more strongly typed than using strings.

A follow-on patch will do the same for IsWasm64.

Differential Revision: https://reviews.llvm.org/D125713

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[WebAssembly] Added initial type checker to MC Assembler

This to protect against non-sensical instruction sequences being assembled,
which would either cause asserts/crashes further down, or a Wasm

[WebAssembly] Added initial type checker to MC Assembler

This to protect against non-sensical instruction sequences being assembled,
which would either cause asserts/crashes further down, or a Wasm module being output that doesn't validate.

Unlike a validator, this type checker is able to give type-errors as part of the parsing process, which makes the assembler much friendlier to be used by humans writing manual input.

Because the MC system is single pass (instructions aren't even stored in MC format, they are directly output) the type checker has to be single pass as well, which means that from now on .globaltype and .functype decls must come before their use. An extra pass is added to Codegen to collect information for this purpose, since AsmPrinter is normally single pass / streaming as well, and would otherwise generate this information on the fly.

A `-no-type-check` flag was added to llvm-mc (and any other tools that take asm input) that surpresses type errors, as a quick escape hatch for tests that were not intended to be type correct.

This is a first version of the type checker that ignores control flow, i.e. it checks that types are correct along the linear path, but not the branch path. This will still catch most errors. Branch checking could be added in the future.

Differential Revision: https://reviews.llvm.org/D104945

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[WebAssembly] Adding 64-bit version of R_WASM_MEMORY_ADDR_* relocs

This adds 4 new reloc types.

A lot of code that previously assumed any memory or offset values could be contained in a uint32_t (a

[WebAssembly] Adding 64-bit version of R_WASM_MEMORY_ADDR_* relocs

This adds 4 new reloc types.

A lot of code that previously assumed any memory or offset values could be contained in a uint32_t (and often truncated results from functions returning 64-bit values) have been upgraded to uint64_t. This is not comprehensive: it is only the values that come in contact with the new relocation values and their dependents.

A new tablegen mapping was added to automatically upgrade loads/stores in the assembler, which otherwise has no way to select for these instructions (since they are indentical other than for the offset immediate). It follows a similar technique to https://reviews.llvm.org/D53307

Differential Revision: https://reviews.llvm.org/D81704

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[WebAssembly] Make disassembler always emit most canonical name.

Summary:
There are a few instructions that all map to the same opcode, so
when disassembling, we have to pick one. That was just the

[WebAssembly] Make disassembler always emit most canonical name.

Summary:
There are a few instructions that all map to the same opcode, so
when disassembling, we have to pick one. That was just the first one
before (the except_ref variant in the case of "call"), now it is the
one marked as IsCanonical in tablegen, or failing that, the shortest
name (which is typically the "canonical" one).

Also introduced a canonical "end" instruction for this purpose.

Reviewers: dschuff, tlively

Subscribers: sbc100, jgravelle-google, aheejin, llvm-commits, sunfish

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57713

llvm-svn: 353131

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Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the ne

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636

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[WebAssembly] Massive instruction renaming

Summary:
An automated renaming of all the instructions listed at
https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329
as well as some simi

[WebAssembly] Massive instruction renaming

Summary:
An automated renaming of all the instructions listed at
https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329
as well as some similarly-named identifiers.

Reviewers: aheejin, dschuff, aardappel

Subscribers: sbc100, jgravelle-google, eraman, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D56338

llvm-svn: 350609

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[WebAssembly][NFC] Remove WebAssemblyStackifier TableGen backend

Summary:
Replace its functionality with a TableGen InstrInfo relational
instruction mapping. Although arguably more complex than the

[WebAssembly][NFC] Remove WebAssemblyStackifier TableGen backend

Summary:
Replace its functionality with a TableGen InstrInfo relational
instruction mapping. Although arguably more complex than the TableGen
backend, the relational mapping is a smaller maintenance burden than a
TableGen backend.

Reviewers: aardappel, aheejin, dschuff

Subscribers: mgorny, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53307

llvm-svn: 344962

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[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] (fixed)

llvm-svn: 344287

[WebAssembly] Revert rL344180, which was breaking expensive checks

llvm-svn: 344280

[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS]

Summary:
By moving that line into the `I` multiclass.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-co

[WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS]

Summary:
By moving that line into the `I` multiclass.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53093

llvm-svn: 344180

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[WebAssembly] Improve readability of SIMD instructions (NFC)

Summary:
- Categorize instructions into the categories as in the SIMD spec
- Move SIMD-related definition to WebAssemblyInstrSIMD.td
- Pu

[WebAssembly] Improve readability of SIMD instructions (NFC)

Summary:
- Categorize instructions into the categories as in the SIMD spec
- Move SIMD-related definition to WebAssemblyInstrSIMD.td
- Put definition and use of patterns together
- Add newlines here and there

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53045

llvm-svn: 344086

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[WebAssembly] Simplified selecting asmmatcher stack instructions.

Summary:
By using the existing isCodeGenOnly bit in the tablegen defs, as
suggested by tlively in https://reviews.llvm.org/D51662

T

[WebAssembly] Simplified selecting asmmatcher stack instructions.

Summary:
By using the existing isCodeGenOnly bit in the tablegen defs, as
suggested by tlively in https://reviews.llvm.org/D51662

Tested: llvm-lit -v `find test -name WebAssembly`

Reviewers: tlively

Subscribers: dschuff, sbc100, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52373

llvm-svn: 342772

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[WebAssembly][NFC] Move specific instruction formats to specific files

Summary:
WebAssemblyInstrFormats.td retains only multiclasses that are used in
multiple other tablegen files.

Reviewers: aheej

[WebAssembly][NFC] Move specific instruction formats to specific files

Summary:
WebAssemblyInstrFormats.td retains only multiclasses that are used in
multiple other tablegen files.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D51143

llvm-svn: 340503

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[WebAssembly] Arbitrary BUILD_VECTOR and remove i64x2.mul

Summary:
This CL adds support for arbitrary BUILD_VECTORS, i.e. not splats and
not consts. This is the last feature needed to properly lower

[WebAssembly] Arbitrary BUILD_VECTOR and remove i64x2.mul

Summary:
This CL adds support for arbitrary BUILD_VECTORS, i.e. not splats and
not consts. This is the last feature needed to properly lower v2i64
multiplies without a i64x2.mul instruction (which is not in the spec),
so i64x2.mul is removed as well.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D51082

Remove unnecessary condition and fix whitespace

llvm-svn: 340472

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[WebAssembly] Update SIMD binary arithmetic

Add missing SIMD types (v2f64) and binary ops. Also adds
tablegen support for automatically prepending prefix byte to SIMD
opcodes.

Differential Revision

[WebAssembly] Update SIMD binary arithmetic

Add missing SIMD types (v2f64) and binary ops. Also adds
tablegen support for automatically prepending prefix byte to SIMD
opcodes.

Differential Revision: https://reviews.llvm.org/D50292

Patch by Thomas Lively

llvm-svn: 339186

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[WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.

Summary:
One for register based, much like the existing definitions,
and one for stack based (suffix _S).

This allows us to

[WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.

Summary:
One for register based, much like the existing definitions,
and one for stack based (suffix _S).

This allows us to use registers in most of LLVM (which works better),
and stack based in MC (which results in a simpler and more readable
assembler / disassembler).

Tried to keep this change as small as possible while passing tests,
follow-up commit will:
- Add reg->stack conversion in MI.
- Fix asm/disasm in MC to be stack based.
- Fix emitter to be stack based.

tests passing:
llvm-lit -v `find test -name WebAssembly`

test/CodeGen/WebAssembly
test/MC/WebAssembly
test/MC/Disassembler/WebAssembly
test/DebugInfo/WebAssembly
test/CodeGen/MIR/WebAssembly
test/tools/llvm-objdump/WebAssembly

Reviewers: dschuff, sbc100, jgravelle-google, sunfish

Subscribers: aheejin, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D48183

llvm-svn: 334985

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Remove \brief commands from doxygen comments.

We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they ar

Remove \brief commands from doxygen comments.

We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46290

llvm-svn: 331272

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[WebAssembly] Add target feature for atomics

Summary:
This tracks the WebAssembly threads feature proposal at
https://github.com/WebAssembly/threads/blob/master/proposals/threads/Overview.md

Differ

[WebAssembly] Add target feature for atomics

Summary:
This tracks the WebAssembly threads feature proposal at
https://github.com/WebAssembly/threads/blob/master/proposals/threads/Overview.md

Differential Revision: https://reviews.llvm.org/D37300

llvm-svn: 312145

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[WebAssembly] Add binary-encoding opcode values to instruction descriptions.

llvm-svn: 283389

[WebAssembly] Initial SIMD128 support.

Kicks off the implementation of wasm SIMD128 support (spec:
https://github.com/stoklund/portable-simd/blob/master/portable-simd.md),
adding support for add, su

[WebAssembly] Initial SIMD128 support.

Kicks off the implementation of wasm SIMD128 support (spec:
https://github.com/stoklund/portable-simd/blob/master/portable-simd.md),
adding support for add, sub, mul for i8x16, i16x8, i32x4, and f32x4.

The spec is WIP, and might change in the near future.

Patch by João Porto

Differential Revision: https://reviews.llvm.org/D22686

llvm-svn: 277543

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[WebAssembly] Fix an emacs syntax highlighting comment.

llvm-svn: 254997

[WebAssembly] Use tabs instead of spaces in assembly output.

This seems to be the most popular convention among the other backends.

llvm-svn: 253172

[WebAssembly] Add AsmString strings for most instructions.

Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC

[WebAssembly] Add AsmString strings for most instructions.

Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.

llvm-svn: 252203

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[WebAssembly] Rename several functions and types according to the new spec.

llvm-svn: 248644